KR960005392B1 - Dma 및 인터럽트로 사용하기 위해 어드레스 수정을 제공하는 컴퓨터 시스템 - Google Patents

Dma 및 인터럽트로 사용하기 위해 어드레스 수정을 제공하는 컴퓨터 시스템 Download PDF

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Publication number
KR960005392B1
KR960005392B1 KR1019890700612A KR890700612A KR960005392B1 KR 960005392 B1 KR960005392 B1 KR 960005392B1 KR 1019890700612 A KR1019890700612 A KR 1019890700612A KR 890700612 A KR890700612 A KR 890700612A KR 960005392 B1 KR960005392 B1 KR 960005392B1
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KR
South Korea
Prior art keywords
address
signal
channel
computer
interrupt
Prior art date
Application number
KR1019890700612A
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English (en)
Korean (ko)
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KR890702128A (ko
Inventor
브루스 알랜 페어맨
알렌 존 라슨
윌리엄 게라드 스웬톤
로버트 그램프스 쥬니어 테일러
Original Assignee
탄돈 코포레이션
란지트 시틀라니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority claimed from US07/084,318 external-priority patent/US4849875A/en
Application filed by 탄돈 코포레이션, 란지트 시틀라니 filed Critical 탄돈 코포레이션
Publication of KR890702128A publication Critical patent/KR890702128A/ko
Application granted granted Critical
Publication of KR960005392B1 publication Critical patent/KR960005392B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1019890700612A 1987-08-10 1988-02-29 Dma 및 인터럽트로 사용하기 위해 어드레스 수정을 제공하는 컴퓨터 시스템 KR960005392B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US07/084,318 US4849875A (en) 1987-03-03 1987-08-10 Computer address modification system with optional DMA paging
US084,318 1987-08-10
PCT/US1988/000613 WO1989001662A1 (en) 1987-08-10 1988-02-29 Computer system providing address modification for use also with dma and interrupts

Publications (2)

Publication Number Publication Date
KR890702128A KR890702128A (ko) 1989-12-22
KR960005392B1 true KR960005392B1 (ko) 1996-04-24

Family

ID=22184198

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890700612A KR960005392B1 (ko) 1987-08-10 1988-02-29 Dma 및 인터럽트로 사용하기 위해 어드레스 수정을 제공하는 컴퓨터 시스템

Country Status (3)

Country Link
JP (1) JPH02500224A (ja)
KR (1) KR960005392B1 (ja)
WO (1) WO1989001662A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5437042A (en) * 1992-10-02 1995-07-25 Compaq Computer Corporation Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4158227A (en) * 1977-10-12 1979-06-12 Bunker Ramo Corporation Paged memory mapping with elimination of recurrent decoding
GB1601955A (en) * 1977-10-21 1981-11-04 Marconi Co Ltd Data processing systems
US4164786A (en) * 1978-04-11 1979-08-14 The Bendix Corporation Apparatus for expanding memory size and direct memory addressing capabilities of digital computer means
US4340932A (en) * 1978-05-17 1982-07-20 Harris Corporation Dual mapping memory expansion unit
JPS5544613A (en) * 1978-09-25 1980-03-29 Toshiba Corp Memory device
US4419727A (en) * 1979-01-02 1983-12-06 Honeywell Information Systems Inc. Hardware for extending microprocessor addressing capability
US4403283A (en) * 1980-07-28 1983-09-06 Ncr Corporation Extended memory system and method
US4550368A (en) * 1982-07-02 1985-10-29 Sun Microsystems, Inc. High-speed memory and memory management system
JPS5952497A (ja) * 1982-09-17 1984-03-27 Nec Corp デコ−ダ回路
US4669043A (en) * 1984-02-17 1987-05-26 Signetics Corporation Memory access controller
JPS60179984A (ja) * 1984-02-27 1985-09-13 Nec Corp メモリ回路方式
US4688166A (en) * 1984-08-03 1987-08-18 Motorola Computer Systems, Inc. Direct memory access controller supporting multiple input/output controllers and memory units
JPH0799616B2 (ja) * 1984-08-30 1995-10-25 三菱電機株式会社 半導体記憶装置
JPS61104391A (ja) * 1984-10-23 1986-05-22 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
KR890702128A (ko) 1989-12-22
JPH0585052B2 (ja) 1993-12-06
WO1989001662A1 (en) 1989-02-23
JPH02500224A (ja) 1990-01-25

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