KR960004980Y1 - Aspect line deletion circuit of monitor - Google Patents

Aspect line deletion circuit of monitor Download PDF

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Publication number
KR960004980Y1
KR960004980Y1 KR2019900001694U KR900001694U KR960004980Y1 KR 960004980 Y1 KR960004980 Y1 KR 960004980Y1 KR 2019900001694 U KR2019900001694 U KR 2019900001694U KR 900001694 U KR900001694 U KR 900001694U KR 960004980 Y1 KR960004980 Y1 KR 960004980Y1
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KR
South Korea
Prior art keywords
transistor
resistor
monitor
diode
base
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KR2019900001694U
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Korean (ko)
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KR910016040U (en
Inventor
김점식
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대우전자 주식회사
김용원
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Priority to KR2019900001694U priority Critical patent/KR960004980Y1/en
Publication of KR910016040U publication Critical patent/KR910016040U/en
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Publication of KR960004980Y1 publication Critical patent/KR960004980Y1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/20Prevention of damage to cathode-ray tubes in the event of failure of scanning
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용없음.None.

Description

모니터 고장에 의한 발생되는 종횡선 제거회로Vertical and horizontal lines elimination circuit caused by monitor failure

제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 수직편향신호 2 : 수평편향신호1: vertical deflection signal 2: horizontal deflection signal

3, 3' : 적분회로 4 : 음극선관(CRT)3, 3 ': Integrating circuit 4: Cathode ray tube (CRT)

Q1-Q2: 트랜지스터 R1-R12: 저항Q 1 -Q 2 : transistor R 1 -R 12 : resistance

D1-D4: 다이오드 C1-C3: 콘덴서D 1 -D 4 : Diode C 1 -C 3 : Capacitor

VR : 휘도조절저항VR: luminance control resistor

본 고안은 고해상도의 텔레비젼 수상기나 모니터가 고장시에 발생하는 종횡선을 제거하여 음극선관(CRT)을 보호할 수 있도록 하는 회로에 관한 것이다.The present invention relates to a circuit that can protect the cathode ray tube (CRT) by removing the vertical line generated when a high resolution television receiver or monitor fails.

일반적으로 고해상도를 갖는 수상기 및 모니터에 사용되는 음극선관은 매우 정밀한 부품으로 고가이다. 따라서 이러한 음극선관은 수직편향 신호와 수평편향 신호에 의해 특정화상을 디스플레이시키게 되며 이때 어떠한 고장에 의해 수직 및 수평편향이 이루어지지 않으면 무척 밝은 빛의 횡선 또는 종선이 발생하여 음극선관의 형광막을 태워 쉽게 파괴되는 문제점이 야기되는 것이다.In general, cathode ray tubes used in high resolution receivers and monitors are very precise parts and are expensive. Therefore, such a cathode ray tube displays a specific image by a vertical deflection signal and a horizontal deflection signal, and when a vertical and horizontal deflection is not made due to any failure, a very bright horizontal line or vertical line is generated to burn the fluorescent film of the cathode ray tube easily. The problem of being destroyed is caused.

그러므로 본 고안은 상기와 같은 문제점을 해결하기 위해 안출된 것으로 트랜지스터와 저항 및 콘덴서 그리고 다이오드를 사용한 종횡선 제거회로를 제공하여 모니터 고장시 수직 수평편향이 이루어 지지 않게 되면 음극선관의 동작을 중지시켜 강한 빛의 종횡선에 의해 형광막 손상을 방지케 하는데 본 고안의 목적이 있는 것이다.Therefore, the present invention has been devised to solve the above problems, and provides a vertical and horizontal elimination circuit using transistors, resistors, capacitors, and diodes. It is an object of the present invention to prevent damage to the fluorescent film by the vertical line of light.

이하 첨부된 도면에 의해 상세히 설명하면 다음과 같다.Hereinafter, described in detail by the accompanying drawings as follows.

제1도에서와 같이 수직편향신호(1)및 수평편향신호(2)는 적분회로(3)(3')를 통하여 트랜지스터(Q1)(Q2)의 베이스에 인가하고 전원(Vcc)은 저항(R2)(R4)을 거쳐 트랜지스터(Q1)(Q2) 콜렉터 측으로 인가함과 동시에 다이오드(D1)(D2)를 경유하여 트랜지스터(Q3)의 에미터단에 각각 접속하되 이의 콜렉터측은 트랜지스터(Q4) 베이스로 연결하는 한편 음극선관(4)에는 저항(R9)및 다이오드(D4)를 병렬연결하여 트랜지스터(Q4) 콜렉터에 접속하고 또한 저항(R10) 및 다이오드(D4)를 직렬 연결하여 트랜지스터(Q4)와 콘덴서(C3)에 매개된 저항(R8)과 휘도조절저항(VR)사이로 접속하되 트랜지스터(Q4)베이스와 에미터에 연결된 저항(R6)(R7)(R12)에는 -BV 전압을 인가하여서된 모니터 고장에 의해 발생되는 종횡선 제거회로인 것이다.As shown in FIG. 1, the vertical deflection signal 1 and the horizontal deflection signal 2 are applied to the base of the transistors Q 1 and Q 2 through the integrating circuit 3 and 3 'and the power supply Vcc Through the resistors R 2 and R 4 , they are applied to the transistors Q 1 and Q 2 and connected to the emitter terminals of the transistors Q 3 via diodes D 1 and D 2 , respectively. Its collector side is connected to the transistor (Q 4 ) base, while the cathode ray tube (4) is connected in parallel with the resistor (R 9 ) and diode (D 4 ) to the transistor (Q4) collector, and also the resistor (R 10 ) and diode (D 4) of series-connected to the transistor (Q 4) and a capacitor (C 3) a resistor (R 8) and, but connection between the luminance adjustment resistor (VR) transistor (Q 4) resistor connected to the base and the emitter parameter in ( R 6 ) (R 7 ) (R 12 ) is a vertical and horizontal line removal circuit caused by a monitor failure caused by applying a -BV voltage.

상기와 같은 구성으로 이루어진 본 고안의 작용 효과를 설명하면 다음과 같다.Referring to the effect of the present invention made of the configuration as described above are as follows.

모니터의 동작이 정상적일 경우에는 수직편향신호(1)와 수평편향신호(2)가 모두 출력되고 이의 신호가 저항(R1)(R3)및 콘덴서(C1)(C2)로 이루어진 적분회로(3)(3')를 거쳐 트랜지스터(Q1)(Q2)의 베이스에 각각 인가되어 턴온상태로 만든다. 그러므로 전원(Vcc)은 모두 그라운드로 홀러 트랜지스터(Q3)의 에미터에 인가되는 전압이 없어 트랜지스터(Q4)는 차단상태가 된다. 따라서 휘도조절저항(VR)으로 음극선관(4)인 그리드의 바이어스 전압을 조정하여 화면 밝기를 제어하면 되나 모니터 자체의 편향부가 고장일 경우 수직편향신호(1) 또는 수평편향신호(2)가 발생치 않게 되어 트랜지스터(Q1)또는(Q2)는 오프됨과 동시에 트랜지스터(Q3)에미터 전위가 상승하여 턴온됨에 따라 전원(Vcc)이 다이오드(D1)(D2)와 트랜지스터(Q3)를 거쳐 연계접속된 트랜지스터(Q4)베이스에 바이어스 전압을 인가되어져 도통상태로 만들게 된다. 그러므로 -BV전압이 저항(R12)과 휘도조절저항(VR)을 경유하고 다시 다이오드(D4)및 저항(R10)을 거쳐 음극선관(4)의 그리드(G1)에 인가됨에 따라 음극선관(4) 캐소우드 부근의 전계는 0으로되어 전자를 전혀 흡입하지 않게 되므로 커트오프(cut off)상태가 되어 형광막의 손상을 방지할 수 있는 것이다. 이상에서 상술한 바와같이 작용하는 본 고안은 고해상도를 갖는 고가의 음극선관(4)이 고장일 경우 트랜지스터(Q1-Q4)및 저항(R1-R12), 콘덴서(C1-C3)그리고 다이오드(D1-D4)로서 강한 빛의 종횡선에 의한 형광막 손상을 방지할 수 있는 종횡선 제거회로를 제공함으로서 모니터의 신뢰성 향상에 크게 기여할 수 있는 유용한 고안인 것이다.When the operation of the monitor is normal, the vertical deflection signal 1 and the horizontal deflection signal 2 are both output, and the signal is integrated with a resistor R 1 (R 3 ) and a capacitor C 1 (C 2 ). The circuits are applied to the bases of the transistors Q 1 and Q 2 via the circuits 3 and 3 ', respectively, to be turned on. Therefore, since the power supply Vcc is all grounded, there is no voltage applied to the emitter of the hauler transistor Q 3 , and the transistor Q 4 is turned off. Therefore, the brightness of the screen can be controlled by adjusting the bias voltage of the grid which is the cathode ray tube 4 with the brightness control resistor VR. However, if the deflection of the monitor itself is broken, a vertical deflection signal 1 or a horizontal deflection signal 2 is generated. power supply (Vcc) as does the transistor (Q 1) or (Q 2) is turned off as soon at the same time, transistor (Q 3) the emitter to the potential rise value, the diode (D 1) (D 2) and a transistor (Q 3 The bias voltage is applied to the base of the transistor Q 4 which is connected and connected to the base to make the conductive state. Therefore, as the -BV voltage is applied to the grid G 1 of the cathode ray tube 4 via the resistor R 12 and the luminance control resistor VR and again through the diode D 4 and the resistor R10, the cathode ray tube (4) Since the electric field near the cathode becomes zero and does not inhale electrons at all, the cut-off state can be prevented and damage to the fluorescent film can be prevented. The present invention, which operates as described above, in the event that an expensive cathode ray tube 4 having a high resolution fails, the transistors Q 1 -Q 4 , the resistors R 1 -R 12 , and the capacitors C 1 -C 3 As a diode (D 1 -D 4 ), it is a useful design that can greatly contribute to improving the reliability of the monitor by providing a vertical line removing circuit that can prevent the fluorescent film damage caused by the vertical line of strong light.

Claims (1)

수직편향신호(1) 및 수평편향신호(2)는 적분회로(3)(3')를 통하여 트랜지스터(Q1)(Q2)의 베이스에 인가하고 전원(Vcc)은 저항(R2)(R4)을 거쳐 트랜지스터(Q1)(Q2) 콜렉터측으로 인가함과 동시에 다이오드(D1)(D2)를 경유하여 트랜지스터(Q|3)의 에미터단에 각각 접속하되 이의 콜렉터측은 트랜지스터(Q4) 베이스로 연결하는 한편 음극선관(4)에는 저항(R9)및 다이오드(D3)를 병렬연결하여 트랜지스터(Q4) 콜렉터에 접속하고 또한 저항(R10) 및 다이오드(D4)를 직렬 연결하여 트랜지스터(Q4)와 콘덴서(C3)에 매개된 저항(R8)과 휘도조절저항(VR)사이로 접속하되 트랜지스터(Q4)베이스와 에미터에 연결된 저항(R6)(R7)(R12)에는 -BV 전압을 인가하여서된 것을 특징으로 하는 모니터 고장에 의해 발생되는 종횡선 제거 회로.The vertical deflection signal 1 and the horizontal deflection signal 2 are applied to the base of the transistors Q 1 and Q 2 through the integrating circuits 3 and 3 'and the power supply Vcc is applied to the resistor R 2 ( R 4 ) is applied to the transistor (Q 1 ) (Q 2 ) collector side and is connected to the emitter terminal of transistor (Q | 3 ) via diode (D 1 ) (D 2 ), respectively, whose collector side is transistor ( Q 4 ) while connecting to the base while connecting the resistor (R 9 ) and diode (D 3 ) in parallel to the cathode ray tube (4) to the transistor (Q 4 ) collector and also to the resistor (R 10 ) and diode (D 4 ) a series-connected to the transistor (Q 4) and a capacitor (C 3) a resistor (R 8) and a brightness control resistor (VR) connected, but the transistor (Q 4) resistance (R 6) connected to the base and the emitter between the parameters in ( R 7 ) (R 12 ) is a vertical line removal circuit caused by a monitor failure, characterized in that by applying a -BV voltage.
KR2019900001694U 1990-02-16 1990-02-16 Aspect line deletion circuit of monitor KR960004980Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019900001694U KR960004980Y1 (en) 1990-02-16 1990-02-16 Aspect line deletion circuit of monitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019900001694U KR960004980Y1 (en) 1990-02-16 1990-02-16 Aspect line deletion circuit of monitor

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KR910016040U KR910016040U (en) 1991-09-25
KR960004980Y1 true KR960004980Y1 (en) 1996-06-17

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KR2019900001694U KR960004980Y1 (en) 1990-02-16 1990-02-16 Aspect line deletion circuit of monitor

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KR910016040U (en) 1991-09-25

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