KR960004086B1 - Forming method of self aligned contact for semiconductor device - Google Patents

Forming method of self aligned contact for semiconductor device Download PDF

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Publication number
KR960004086B1
KR960004086B1 KR92026717A KR920026717A KR960004086B1 KR 960004086 B1 KR960004086 B1 KR 960004086B1 KR 92026717 A KR92026717 A KR 92026717A KR 920026717 A KR920026717 A KR 920026717A KR 960004086 B1 KR960004086 B1 KR 960004086B1
Authority
KR
South Korea
Prior art keywords
film
semiconductor device
forming method
oxide film
aligned contact
Prior art date
Application number
KR92026717A
Other languages
Korean (ko)
Other versions
KR940016879A (en
Inventor
Hae-Sung Park
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Priority to KR92026717A priority Critical patent/KR960004086B1/en
Publication of KR940016879A publication Critical patent/KR940016879A/en
Application granted granted Critical
Publication of KR960004086B1 publication Critical patent/KR960004086B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Abstract

forming a contact mask by storing a first nitride film, oxide film and polysilicon film after forming a gate electrode on a silicon substrate; storing the second nitride film on top of that after eliminating the mask by leaving the topology part of the oxide film where the contact hole between the gate electrode is formed when etching the polysilicon film and oxide film using the contact mask; eliminating the left oxide film of topology part by wet etching after leaving the second nitride film on the side of oxide film by blanket etching; and forming a contact hole by eliminating the second nitride film and the first nitride film by the wet etching.
KR92026717A 1992-12-30 1992-12-30 Forming method of self aligned contact for semiconductor device KR960004086B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92026717A KR960004086B1 (en) 1992-12-30 1992-12-30 Forming method of self aligned contact for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92026717A KR960004086B1 (en) 1992-12-30 1992-12-30 Forming method of self aligned contact for semiconductor device

Publications (2)

Publication Number Publication Date
KR940016879A KR940016879A (en) 1994-07-25
KR960004086B1 true KR960004086B1 (en) 1996-03-26

Family

ID=19347852

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92026717A KR960004086B1 (en) 1992-12-30 1992-12-30 Forming method of self aligned contact for semiconductor device

Country Status (1)

Country Link
KR (1) KR960004086B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3535615B2 (en) 1995-07-18 2004-06-07 株式会社ルネサステクノロジ Semiconductor integrated circuit device
KR100400298B1 (en) * 1999-06-11 2003-10-04 주식회사 하이닉스반도체 A method of manufacturing self align contact of semiconductor device

Also Published As

Publication number Publication date
KR940016879A (en) 1994-07-25

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