KR960004086B1 - Forming method of self aligned contact for semiconductor device - Google Patents
Forming method of self aligned contact for semiconductor device Download PDFInfo
- Publication number
- KR960004086B1 KR960004086B1 KR92026717A KR920026717A KR960004086B1 KR 960004086 B1 KR960004086 B1 KR 960004086B1 KR 92026717 A KR92026717 A KR 92026717A KR 920026717 A KR920026717 A KR 920026717A KR 960004086 B1 KR960004086 B1 KR 960004086B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- semiconductor device
- forming method
- oxide film
- aligned contact
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 150000004767 nitrides Chemical class 0.000 abstract 5
- 238000005530 etching Methods 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229920005591 polysilicon Polymers 0.000 abstract 2
- 238000001039 wet etching Methods 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
forming a contact mask by storing a first nitride film, oxide film and polysilicon film after forming a gate electrode on a silicon substrate; storing the second nitride film on top of that after eliminating the mask by leaving the topology part of the oxide film where the contact hole between the gate electrode is formed when etching the polysilicon film and oxide film using the contact mask; eliminating the left oxide film of topology part by wet etching after leaving the second nitride film on the side of oxide film by blanket etching; and forming a contact hole by eliminating the second nitride film and the first nitride film by the wet etching.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92026717A KR960004086B1 (en) | 1992-12-30 | 1992-12-30 | Forming method of self aligned contact for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92026717A KR960004086B1 (en) | 1992-12-30 | 1992-12-30 | Forming method of self aligned contact for semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940016879A KR940016879A (en) | 1994-07-25 |
KR960004086B1 true KR960004086B1 (en) | 1996-03-26 |
Family
ID=19347852
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92026717A KR960004086B1 (en) | 1992-12-30 | 1992-12-30 | Forming method of self aligned contact for semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960004086B1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3535615B2 (en) | 1995-07-18 | 2004-06-07 | 株式会社ルネサステクノロジ | Semiconductor integrated circuit device |
KR100400298B1 (en) * | 1999-06-11 | 2003-10-04 | 주식회사 하이닉스반도체 | A method of manufacturing self align contact of semiconductor device |
-
1992
- 1992-12-30 KR KR92026717A patent/KR960004086B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR940016879A (en) | 1994-07-25 |
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Legal Events
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G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20110222 Year of fee payment: 16 |
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LAPS | Lapse due to unpaid annual fee |