KR960008551B1 - Contact manufacturing method of semiconductor device - Google Patents

Contact manufacturing method of semiconductor device Download PDF

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Publication number
KR960008551B1
KR960008551B1 KR92027093A KR920027093A KR960008551B1 KR 960008551 B1 KR960008551 B1 KR 960008551B1 KR 92027093 A KR92027093 A KR 92027093A KR 920027093 A KR920027093 A KR 920027093A KR 960008551 B1 KR960008551 B1 KR 960008551B1
Authority
KR
South Korea
Prior art keywords
polysilicon
forming
bpsg
etching
forth
Prior art date
Application number
KR92027093A
Other languages
Korean (ko)
Other versions
KR940016504A (en
Inventor
Hun-Chol Lee
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Priority to KR92027093A priority Critical patent/KR960008551B1/en
Publication of KR940016504A publication Critical patent/KR940016504A/en
Application granted granted Critical
Publication of KR960008551B1 publication Critical patent/KR960008551B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/488—Word lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

forming word line which comprises a first polysilicon (2)/an oxide layer (3)/a second polysilicon (4) on the upper side of the substrate (1); forming an oxide spacer (6) and evaporating BPSG (7) flatly over the oxide layer of the word line; depositing a third polysilicon (8), forming a third polysilicon pattern (8A) by etching using a patterned photoresist (9) opened wider than a bit line contact hole (10) and a third polysilicon spacer (8B) in the side wall of the second polysilicon instantaneously; forming a bit line contact hole (10) by etching the revealed BPSG (7) and depositing a forth polysilicon (11) thickly; forming a forth polysilicon plug (12) by etchback of the forth, the third, the second polysilicon to reveal BPSG; forming bit line (16) by etching a fifth polysilicon (13) by patterning.
KR92027093A 1992-12-31 1992-12-31 Contact manufacturing method of semiconductor device KR960008551B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92027093A KR960008551B1 (en) 1992-12-31 1992-12-31 Contact manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92027093A KR960008551B1 (en) 1992-12-31 1992-12-31 Contact manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
KR940016504A KR940016504A (en) 1994-07-23
KR960008551B1 true KR960008551B1 (en) 1996-06-28

Family

ID=19348240

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92027093A KR960008551B1 (en) 1992-12-31 1992-12-31 Contact manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR960008551B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399934B1 (en) * 1996-06-28 2003-12-24 주식회사 하이닉스반도체 Contact Forming Method of Semiconductor Device
KR100972908B1 (en) * 2008-03-17 2010-07-28 주식회사 하이닉스반도체 Method of forming a semiconductor device

Also Published As

Publication number Publication date
KR940016504A (en) 1994-07-23

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Payment date: 20050523

Year of fee payment: 10

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