KR960003182A - Line Redundancy Unit in HDLC NRZI Communication System - Google Patents

Line Redundancy Unit in HDLC NRZI Communication System Download PDF

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Publication number
KR960003182A
KR960003182A KR1019940012918A KR19940012918A KR960003182A KR 960003182 A KR960003182 A KR 960003182A KR 1019940012918 A KR1019940012918 A KR 1019940012918A KR 19940012918 A KR19940012918 A KR 19940012918A KR 960003182 A KR960003182 A KR 960003182A
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KR
South Korea
Prior art keywords
data
signal
line redundancy
multiplexer
hdlc
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Application number
KR1019940012918A
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Korean (ko)
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KR970011740B1 (en
Inventor
이기수
Original Assignee
문성주
주식회사 나라계전
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Priority to KR1019940012918A priority Critical patent/KR970011740B1/en
Publication of KR960003182A publication Critical patent/KR960003182A/en
Application granted granted Critical
Publication of KR970011740B1 publication Critical patent/KR970011740B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/14—Two-way operation using the same type of signal, i.e. duplex

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

본 발명은 HDLC NRZI 방식의 디지탈 통신에서 사용하기 위한 선로이중화장치에 관한 것으로서, 데이타검출회로를 사용하여 데이타출력유무를 검출하는 방식을 채용하여 종래의 소프트웨어적인 데이타처리와는 달리 CPU에 부담을 주지 않을 뿐만 아니라, 멀티플렉서를 채용하여 하나의 SIO회로만으로도 통신선로를 이중화시킬 수 있으며 또한, 데이타 검출회로의 기준시간을 발생시키기 위해서 기존의 RC회로를 사용하지 않고 보드 클럭(baud clock)을 그대로 사용하므로서, 정확한 시간측정이 가능한 선로이중화시스템을 제공한다.The present invention relates to a line redundancy device for use in HDLC NRZI type digital communication, and employs a method of detecting the presence or absence of data output using a data detection circuit, thereby burdening the CPU unlike conventional software data processing. In addition, the multiplexer can be used to double the communication line with only one SIO circuit. Also, to generate the reference time of the data detection circuit, the board clock is used without using the existing RC circuit. It also provides a line redundancy system for accurate time measurement.

Description

HDLC NRZI 통신 시스템에서의 선로이중화장치Line Redundancy Unit in HDLC NRZI Communication System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 선로이중화시스템의 볼록도,2 is a convex diagram of a line redundancy system according to the present invention;

제3도는 본 발명에 따른 선로이중화시스템의 데이타검출기의 블록도이다3 is a block diagram of a data detector of a line redundancy system according to the present invention.

Claims (2)

이중화된 통신선로로부터 데이타를 송수신하기 위한 제1 및 제2데이타 송수신부(1,2)와, 2개의 AND 게이트(8.9)와, 제1 및 제2데이타 송수신부에서 수신된 데이타중에서 하이(high)나 로우(low)신호가 연속적으로 8개 이상 발생하는지를 판단하기 위한 제1 및 제2데이타 검출기 (3,4)와, 제1 및 제2데이타 검출부로부터의 출력을 디코딩하여 멀터플렉서를 제어하기 위한 신호를 발생하기 위한 디코더(5)와, 디코더로부터의 출력신호에 의해 제1데이타 송수신부와 제2데이타 송수신부의 송수신신호중 하나를 선택하여 SIO부로 전송하기 위한 멀티플렉서(6)와. 멀티플렉서로부터 데이타 신호를 수신하여 시리얼 통신을 위한 SIO부(7)로 이루어진 것을 특징으로 하는 선로 이중화장치.The first and second data transceivers 1 and 2 for transmitting and receiving data from the redundant communication line, the two AND gates 8.9, and the data received from the first and second data transceivers are high. And the first and second data detectors 3 and 4 for determining whether eight or more low signals occur continuously, and the output from the first and second data detectors is decoded to control the multiplexer. A decoder (5) for generating a signal for transmitting a signal, a multiplexer (6) for selecting one of the transmission / reception signals of the first data transmission unit and the second data transmission unit and outputting the signal to the SIO unit by an output signal from the decoder. Receiving a data signal from the multiplexer, the line redundancy device, characterized in that consisting of the SIO unit (7) for serial communication. 제1항에 있어서, 선로이중화장치의 데이타검출기(3.4)는 버스를 통해 수신된 데이타신호의 상승에지부와 하강에지(edge)부를 검출하기 위한 에지검출부(11), 보드 레이트 클럭 (baud rate clock)을 클럭신호로 받아 검출된 에지부의 수를 카운트하는 카운터부(12)와, 카운터부로부터의 출력이 8보다 큰지를 비교하는 비교기 (13)로 이루어진 것을 특징으로 하는 선로이중화장치. .The data detector (3.4) of claim 1, wherein the data detector (3.4) of the line redundancy device includes an edge detector (11) and a baud rate clock for detecting the rising edge and the falling edge of the data signal received through the bus. And a comparator (13) for counting the number of edges detected as a clock signal and a comparator (13) for comparing whether the output from the counter is greater than eight. . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940012918A 1994-06-09 1994-06-09 Duo-line device in hdlc nrzi communication system KR970011740B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940012918A KR970011740B1 (en) 1994-06-09 1994-06-09 Duo-line device in hdlc nrzi communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940012918A KR970011740B1 (en) 1994-06-09 1994-06-09 Duo-line device in hdlc nrzi communication system

Publications (2)

Publication Number Publication Date
KR960003182A true KR960003182A (en) 1996-01-26
KR970011740B1 KR970011740B1 (en) 1997-07-15

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Application Number Title Priority Date Filing Date
KR1019940012918A KR970011740B1 (en) 1994-06-09 1994-06-09 Duo-line device in hdlc nrzi communication system

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010035108A (en) * 2000-12-27 2001-05-07 마상만 Composition ingredients textile and cloth for shielding of electromagnetic wave, and manufacture method thereof
KR100328475B1 (en) * 1998-06-30 2002-04-17 김경남 A Dual Communication Bus Control System of Serial Data Communication System and a Controlling Method thereof
KR100461793B1 (en) * 2002-04-23 2004-12-14 강수행 Leather Manufacturing Process

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100328475B1 (en) * 1998-06-30 2002-04-17 김경남 A Dual Communication Bus Control System of Serial Data Communication System and a Controlling Method thereof
KR20010035108A (en) * 2000-12-27 2001-05-07 마상만 Composition ingredients textile and cloth for shielding of electromagnetic wave, and manufacture method thereof
KR100461793B1 (en) * 2002-04-23 2004-12-14 강수행 Leather Manufacturing Process

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Publication number Publication date
KR970011740B1 (en) 1997-07-15

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