KR960002492A - Manufacturing method of semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, wherein a gate electrode is formed of a polysilicon layer and an amorphous silicon layer containing impurities, and after ion implantation of impurities at a low concentration, an insulating spacer made of a low temperature oxide film is used. Formed on the sidewalls of the semiconductor substrate, and secondly implanted with a high concentration of impurities to form a semiconductor device having a diffusion region having an LDD structure. Therefore, in the ion implantation process for forming the diffusion region, the impurity channeling to the channel region under the gate electrode The amorphous silicon layer prevents the change of the threshold current and the threshold voltage, thereby improving the reliability and process yield of device operation.

Description

Manufacturing method of semiconductor device

As this is a public information case, the full text was not included.

1 is a cross-sectional view of a semiconductor device having a conventional MOS field effect transistor,

2 is a cross-sectional view of a semiconductor device having a MOS field effect transistor according to the present invention.

Claims (4)

Forming a gate oxide film on a first conductive semiconductor substrate, forming a gate electrode comprising a polysilicon layer pattern overlapping each other on the gate oxide film and an amorphous silicon layer pattern containing impurities; Forming a low concentration impurity diffusion region with a second conductivity type impurity on the semiconductor substrate exposed by the gate electrode, forming an insulating spacer of a low temperature oxide film on the sidewall of the gate electrode, and forming the gate electrode And forming a high concentration impurity diffusion region overlapping the exposed low concentration impurity diffusion region as an impurity of the second conductive type using an insulating spacer as a mask. The method of manufacturing a semiconductor device according to claim 1, wherein the polysilicon or the like is formed to a thickness of 30% or less of the total thickness of the gate electrode. The method of claim 1, wherein the amorphous silicon layer including the impurity is formed to a thickness of 70% or less of the total thickness of the gate electrode. The method of manufacturing a semiconductor device according to claim 1, wherein the low temperature oxide film is formed at a temperature of about 400-450 ° C. ※ Note: The disclosure is based on the initial application.