KR930003296A - Drain leakage current prevention MISFET and its manufacturing method - Google Patents

Drain leakage current prevention MISFET and its manufacturing method Download PDF

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Publication number
KR930003296A
KR930003296A KR1019910011825A KR910011825A KR930003296A KR 930003296 A KR930003296 A KR 930003296A KR 1019910011825 A KR1019910011825 A KR 1019910011825A KR 910011825 A KR910011825 A KR 910011825A KR 930003296 A KR930003296 A KR 930003296A
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South Korea
Prior art keywords
misfet
polycrystalline silicon
leakage current
gate electrode
gate
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KR1019910011825A
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Korean (ko)
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KR940004415B1 (en
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권호엽
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문정환
금성일렉트론 주식회사
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Priority to KR1019910011825A priority Critical patent/KR940004415B1/en
Publication of KR930003296A publication Critical patent/KR930003296A/en
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Publication of KR940004415B1 publication Critical patent/KR940004415B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음.No content.

Description

드레인 누설전류 방지 MISFET 및 그 제조방법Drain leakage current prevention MISFET and its manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 MOSFET제조공정 단면도,2 is a cross-sectional view of the MOSFET manufacturing process of the present invention,

제3도는 본 발명의 MOSFET 구조도.3 is a MOSFET structure diagram of the present invention.

Claims (5)

드레인 누설 전류 방지용 MISFET 제조방법에 있어서, 제1도전형 실리콘 기판위에 질화막을 데포지션 한 후 사진식각 공정에 의하여 게이트가 형성될 부분의 질화막을 제거하고, 제1도전형으로 도핑된 다결정 실리콘을 데포지션 하는 단계와, 상기 다결정실리콘 위에 산화막을 데포지션 한 후 비등방성 식각에 의해서 상기 산화막 및 다결정 실리콘의 사이드월 스페이서를 형성하는 단계와, 상기 사이드월 스페이서의 산화막을 제거하고, 제1도 전형의 불순물 이온을 주입하여 MISFET의 전기적 특성을 조절하는 단계와, 열 공정에 의해 상기 다결정 실리콘 내의 불순물을 채널 부위로 확산시키고, 상기 다결정 실리콘을 산화시키면서 게이트 산화막을 성장시키는 단계와, 다결정 실리콘을 데포지션한후 비등방성 식각을 실시하여 게이트전극을 형성하고 질화막은 제거하는 단계와, 상기 게이트 전극에 산화막 사이드월 스페이서를 형성하고 제1도전형과 반대형의 소스-드레인을 형성하는 단계를 포함하는 드레인 누설 전류 방지용 MISFET 제조방법.In the MISFET manufacturing method for preventing drain leakage current, after depositing a nitride film on the first conductive silicon substrate, the nitride film of the portion where the gate is to be formed is removed by a photolithography process, and the polycrystalline silicon doped with the first conductive type is used. Positioning the oxide film on the polycrystalline silicon, and forming sidewall spacers of the oxide film and the polycrystalline silicon by anisotropic etching, and removing the oxide film of the sidewall spacer, Implanting impurity ions to control the electrical characteristics of the MISFET, diffusing impurities in the polycrystalline silicon to a channel region by a thermal process, growing a gate oxide film while oxidizing the polycrystalline silicon, and depositing polycrystalline silicon Anisotropic etching is then performed to form gate electrodes and nitride The step of removing and, forming oxide sidewall spacers on the gate electrode and the first conductivity type and source of the opposite-type-drain leakage current and forming a drain for preventing MISFET method. 제1항에 있어서, 상기 제1도전형은 P형 반도체인 것이 특징인 누설 전류 방지용 MISFET 제조방법.The method of claim 1, wherein the first conductive type is a P-type semiconductor. 제1항에 있어서, 상기 제1도전형은 N형 반도체인 것이 특징인 누설 전류 방지용 MISFET 제조방법.The method of claim 1, wherein the first conductive type is an N-type semiconductor. 소오스, 드레인 및 게이트 전극을 가지고 있는 MISFET에 있어서, 상기 게이트전극 아래에 위치하는 채널 주변에는 게이트 전극 주위의 절연체에서 확산된 불순물에 의해 상기 채널보다 높게 도핑된 확산영역이 존재하는 것이 특징인 드게인 누설 전류 방지용 MISFET.In a MISFET having a source, a drain, and a gate electrode, a diffuse region having a diffusion region doped higher than the channel by impurities diffused from an insulator around the gate electrode is disposed around the channel under the gate electrode. Leakage current prevention MISFET. 제4항에 있어서. 상기 게이트 전극과 채널 사이의 게이트 절연막은 일정한 두께의 중심부와 이 중심부 두께보 , 두꺼운 주변부로 이루어진 것이 특징인 트레인 누설 전류 방지용 MISFET.The method of claim 4. The gate insulating film between the gate electrode and the channel is a MISFET for preventing a train leakage current, characterized in that consisting of a central portion of a constant thickness and a thickness thicker than the central portion. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019910011825A 1991-07-11 1991-07-11 Making method and structure of mosfet KR940004415B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910011825A KR940004415B1 (en) 1991-07-11 1991-07-11 Making method and structure of mosfet

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Application Number Priority Date Filing Date Title
KR1019910011825A KR940004415B1 (en) 1991-07-11 1991-07-11 Making method and structure of mosfet

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KR930003296A true KR930003296A (en) 1993-02-24
KR940004415B1 KR940004415B1 (en) 1994-05-25

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KR1019910011825A KR940004415B1 (en) 1991-07-11 1991-07-11 Making method and structure of mosfet

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399911B1 (en) * 2001-12-29 2003-09-29 주식회사 하이닉스반도체 Semiconductor device and method of manufacturing the same
KR100485451B1 (en) * 1996-04-04 2005-08-10 스타 마이크로닉스 컴퍼니 리미티드 Electroacoustic transducer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100485451B1 (en) * 1996-04-04 2005-08-10 스타 마이크로닉스 컴퍼니 리미티드 Electroacoustic transducer
KR100399911B1 (en) * 2001-12-29 2003-09-29 주식회사 하이닉스반도체 Semiconductor device and method of manufacturing the same

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