KR950025869A - How to Form Contact Holes - Google Patents

How to Form Contact Holes Download PDF

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Publication number
KR950025869A
KR950025869A KR1019940002274A KR19940002274A KR950025869A KR 950025869 A KR950025869 A KR 950025869A KR 1019940002274 A KR1019940002274 A KR 1019940002274A KR 19940002274 A KR19940002274 A KR 19940002274A KR 950025869 A KR950025869 A KR 950025869A
Authority
KR
South Korea
Prior art keywords
forming
tantalum oxide
film
oxide film
contact hole
Prior art date
Application number
KR1019940002274A
Other languages
Korean (ko)
Inventor
백용구
은용석
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940002274A priority Critical patent/KR950025869A/en
Publication of KR950025869A publication Critical patent/KR950025869A/en

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Abstract

본 발명은 반도체 소자 제조공정중 금속배선과 하부막과의 연결을 위한 콘택홀 형성방법에 관한 것으로, 워드 라인용 폴리실리콘막 상에 층간 절연막(4)을 형성하고, 전체구조 상부에 탄탈륨옥사이드막(5)을 형성하는 단계; 상기 탄탈륨옥사이드막(5) 상부를 평탄화막(6)으로 평탄화하는 단계; 및 예정된 콘택홀 부위의 상기 탄탈륨옥사이드막(5), 층간 절연막(4)을 선택식각하여 제거함으로써 반도체 기판(1)을 노출시키는 단계를 포함하여 이루어지는 것을 특징을 함으로써 본 발명은 디자인룰에 관게없는 레이어를 식각 장벽으로 사용함으로써 고집적 소자에 적합한 미세 콘택을 기존의 노광기술과 식각기술로도 달성할 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole for connecting a metal wiring to a lower layer during a semiconductor device manufacturing process. (5) forming; Planarizing an upper portion of the tantalum oxide film 5 with a planarization film 6; And exposing the semiconductor substrate 1 by selectively etching and removing the tantalum oxide film 5 and the interlayer insulating film 4 in the predetermined contact hole region. By using the layer as an etch barrier, micro-contacts suitable for highly integrated devices can be achieved with conventional exposure and etching techniques.

Description

콘택홀 형성방법How to Form Contact Holes

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1D도는 본 발명에 따른 콘택홀 형성공정을 나타내는 예시 단면도.1A to 1D are exemplary cross-sectional views showing a contact hole forming process according to the present invention.

Claims (1)

반도체 소자 제조공정중 콘택홀 형성방법에 있어서, 워드라인용 폴리실리콘막 상에 충간 절연막(4)을 형성하고, 전체구조 상부에 탄탈륨옥사이드막(5)을 형성하는 단계; 상기 탄탈륨옥사이드막(5) 상부를 평탄화막(6)으로 평탄화하는 단계; 및 예정된 콘택홀 부위의 상기 탄탈륨옥사이드막(5), 충간 절연막(4)을 선택식각하여 제거함으로써 반도체 기판(1)을 노출시키는 단계를 포함하여 이루어지는 것을 특징으로 하는 콘택홀 형성방법.A method for forming a contact hole in a semiconductor device manufacturing process, the method comprising: forming an interlayer insulating film 4 on a polysilicon film for a word line, and forming a tantalum oxide film 5 over the entire structure; Planarizing an upper portion of the tantalum oxide film 5 with a planarization film 6; And exposing the semiconductor substrate (1) by selectively etching and removing the tantalum oxide film (5) and the interlayer insulating film (4) at a predetermined contact hole area. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940002274A 1994-02-07 1994-02-07 How to Form Contact Holes KR950025869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940002274A KR950025869A (en) 1994-02-07 1994-02-07 How to Form Contact Holes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940002274A KR950025869A (en) 1994-02-07 1994-02-07 How to Form Contact Holes

Publications (1)

Publication Number Publication Date
KR950025869A true KR950025869A (en) 1995-09-18

Family

ID=66663173

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940002274A KR950025869A (en) 1994-02-07 1994-02-07 How to Form Contact Holes

Country Status (1)

Country Link
KR (1) KR950025869A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100458087B1 (en) * 1997-06-30 2005-02-23 주식회사 하이닉스반도체 Method for fabricating semiconductor device to etch oxide layer by gas including small quantity of polymer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100458087B1 (en) * 1997-06-30 2005-02-23 주식회사 하이닉스반도체 Method for fabricating semiconductor device to etch oxide layer by gas including small quantity of polymer

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