KR950022437A - Asynchronous Transmission Method Transmission Processing Layer and Physical Media Sublayer Receiving Processing Apparatus and Method - Google Patents

Asynchronous Transmission Method Transmission Processing Layer and Physical Media Sublayer Receiving Processing Apparatus and Method Download PDF

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Publication number
KR950022437A
KR950022437A KR1019930028935A KR930028935A KR950022437A KR 950022437 A KR950022437 A KR 950022437A KR 1019930028935 A KR1019930028935 A KR 1019930028935A KR 930028935 A KR930028935 A KR 930028935A KR 950022437 A KR950022437 A KR 950022437A
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South Korea
Prior art keywords
storage means
cell
temporary storage
information
cell information
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KR1019930028935A
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Korean (ko)
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KR960008680B1 (en
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정성호
김장경
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양승택
재단법인 한국전자통신연구소
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5638Services, e.g. multimedia, GOS, QOS
    • H04L2012/5663Support of N-ISDN
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5672Multiplexing, e.g. coding, scrambling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5684Characteristics of traffic flows

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

본 발명은 종합정보통신망인 B-ISDN에 접속하기 위한 ATM 근거리망에 사용되는 호스트 인터페이스 접속장치의 구성요소인 비동기 전달방식 전송수렴부 계층과 물래매체부 계층의 수신처리 장치 및 방법에 관한 것으로, ATM 포럼 규격에 맞는 ATM 물리계층의 수신기능을 고속으로 지원하며, 각 저장수단을 효율적으로 관리하는 제어수단을 제공하고, 2개의 메모리뱅크를 통하여 데이타의 수신을 효과적으로 제어함으로써 데이타의 넘침(overflow)을 어느정도 방지할 수 있으며, 적은 규모의 메모리뱅크를 사용하여 공간을 절약할 수 있고, 소프트웨어에서 처리하는 부분과 무리없이 연결되도록 32비트의 워드(word) 단위로 셀정보의 처리가 가능한 효과가 있다.The present invention relates to an asynchronous transmission type transmission convergence layer and a receiving media layer reception processing apparatus and method, which are components of a host interface connection device used in an ATM local area network for accessing a B-ISDN which is a comprehensive information communication network. Supports the ATM physical layer's reception function conforming to the ATM Forum standard at high speed, provides a control means for efficiently managing each storage means, and effectively controls the reception of data through two memory banks. Can be prevented to some extent, the space can be saved by using a small memory bank, and the cell information can be processed in units of 32 bits of words so that it can be connected to the part processed by the software without difficulty. .

Description

비동기 전달방식 전송수렴부계층과 물리매체부계층의 수신처리장치 및 방법Asynchronous Delivery Method Receiving Processing Device and Method of Transmission Convergence Layer and Physical Media Sublayer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 개략적인 블럭구성도.1 is a schematic block diagram according to the present invention.

제2도는 제1도의 세부구성도.2 is a detailed configuration of FIG.

제3도는 본 발명에 따른 전송수렴부계층과 물리매체부계층의 수신처리장치 처리 흐름도.3 is a flowchart of a receiving processing apparatus of a transmission convergence layer and a physical medium sublayer according to the present invention.

Claims (2)

ATM 통신망으로부터 고속으로 수신되는 셀데이타를 광신호로 입력하여 이를 통신망 접속장치에서 인식할 수 있는 전기적 직렬신호로 변환하는 신호변환수단(1); 상기 신호변환수단(1)에서 출력된 직렬정보를 수신하여 현재 ATM 포함에서 인정하고 있는 방식을 사용하여 바이트 단위가 전기적신호로 디코딩하는 디코딩수단(2); 상기 디코딩수단(2)에서 출력되는 선로제어정보를 임시로 저장하기 위한 제1임시저장수단(4); 상기 디코딩수단(2)으로부터 8비트의 셀정보를 바이트단위의 동작을 위해 임시로 저장하는 제2임시 저장수단(3); 상기 제2임시저장수단(3)으로부터 헤더오류검증을 수행하여 수신된 셀의 유효성을 판단하는 헤더오류검증수단(5); 상기 헤더오류검증수단(5)으로부터 검증완료된 셀정보를 접속장치로 보내기 위해 셀정보를 저장하기 위한 2개의 메모리뱅크로 이루어진 셀 정보 저장수단(6); 상기 셀정보 저장수단(6)의 셀정보를 다중화하여 순차적으로 처리하기 위한 다중화수단(7); 상기 다중화수단(7)으로 부터의 다중화된 정보를 바이트 단위로 처리하기 위하여 임시로 저장하는 제3임시저장 수단(8); 접속장치에서 필요한 기능을 수행하기 위하여 상기 제3임시저장수단(8)으로 부터 출력된 정보를 저장하기 위한 4개의 FIFO 뱅크로 이루어진 저장수단(9); 및 상기 제2임시저장수단(3)과 상기 헤더오류검증수단(5)과 사이 셀정보 저장수단(6)과 상기 다중화수단(7)에 연결되어 시스템을 제어하는 수신제어수단(10)을 구비하는 것을 특징으로 하는 비동기 전달방식 전송수렴부계층과 물리매체부계층의 수신처리장치.Signal conversion means (1) for inputting cell data received at high speed from an ATM communication network as an optical signal and converting the cell data into an electrical serial signal that can be recognized by a communication network connection device; Decoding means (2) for receiving the serial information outputted from the signal converting means (1) and decoding the byte unit into an electrical signal using a scheme currently recognized by ATM inclusion; First temporary storage means (4) for temporarily storing the line control information output from said decoding means (2); Second temporary storage means (3) for temporarily storing 8-bit cell information from said decoding means (2) for byte-based operations; Header error verification means (5) for performing header error verification from the second temporary storage means (3) to determine the validity of the received cell; Cell information storage means (6) comprising two memory banks for storing cell information for sending the verified cell information from the header error verification means (5) to the access device; Multiplexing means (7) for multiplexing and sequentially processing cell information of said cell information storing means (6); Third temporary storage means (8) for temporarily storing the multiplexed information from said multiplexing means (7) for processing in units of bytes; Storage means (9) comprising four FIFO banks for storing information output from the third temporary storage means (8) in order to perform a function necessary in the connection apparatus; And a reception control means (10) connected to the second temporary storage means (3), the header error verification means (5), intercell information storage means (6), and the multiplexing means (7) to control a system. Receiving processing apparatus of the asynchronous delivery method transmission convergence layer and the physical medium sublayer. 신호변환수단(1), 디코딩수단(2), 제1임시저장수단(4), 제2임시저장수단(3), 헤더오류검증수단(5), 셀정보 저장수단(6), 다중화수단(7), 제3임시저장수단(8), 저장수단(9) 및 수신제어수단(10)을 구비하는 수신처리장치에 적용되는 방법에 있어서, ATM 통신망으로부터 수신된 정보를 전기적으로 직렬신호로 변환하고, 디코딩하여 셀경계식별 및 헤더오휴검증을 수행하는 제1단계; 상기 제1단계 수행 후, 오류발생시에는 셀이 폐기되며, 헤더오류검증이 완료된 데이타는 셀정보를 형성하기 위하여 셀정보 저장수단(6)의 메모리뱅크에 저장되어 저장된 셀정보는 다중화장치를 통해 다중화되어 FIFO의 상태를 점검하는 제2단계; 상기 제2단계 수행 후, 수신 FIFO로 저장되는 제3단계를 포함하여 이루어지는 것을 특징으로 하는 비동기 전달방식 전송수렴부계층과 물리매체부계층의 수신처리 방법.Signal conversion means (1), decoding means (2), first temporary storage means (4), second temporary storage means (3), header error verification means (5), cell information storage means (6), multiplexing means ( 7) A method applied to a receiving processing apparatus comprising a third temporary storage means 8, a storage means 9, and a reception control means 10, wherein the information received from the ATM communication network is electrically converted into a serial signal. A first step of decoding and performing cell boundary identification and header error verification; After performing the first step, when an error occurs, the cell is discarded, and the data of which header error verification is completed is stored in a memory bank of the cell information storage means 6 to form cell information, and the stored cell information is multiplexed through a multiplexing device. A second step of checking a state of the FIFO; And a third step of storing the received FIFO after performing the second step. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR93028935A 1993-12-21 1993-12-21 Receiving processor and its method in the atm transmission sub-layer and physical layer KR960008680B1 (en)

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KR960008680B1 KR960008680B1 (en) 1996-06-28

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