KR950020752A - Redundancy Circuit of Semiconductor Device - Google Patents

Redundancy Circuit of Semiconductor Device Download PDF

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Publication number
KR950020752A
KR950020752A KR1019930029284A KR930029284A KR950020752A KR 950020752 A KR950020752 A KR 950020752A KR 1019930029284 A KR1019930029284 A KR 1019930029284A KR 930029284 A KR930029284 A KR 930029284A KR 950020752 A KR950020752 A KR 950020752A
Authority
KR
South Korea
Prior art keywords
spare line
redundancy circuit
redundant
semiconductor device
redundancy
Prior art date
Application number
KR1019930029284A
Other languages
Korean (ko)
Other versions
KR970005122B1 (en
Inventor
박주원
권규완
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930029284A priority Critical patent/KR970005122B1/en
Publication of KR950020752A publication Critical patent/KR950020752A/en
Application granted granted Critical
Publication of KR970005122B1 publication Critical patent/KR970005122B1/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/787—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using a fuse hierarchy

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 소자의 리던던시 회로에 관한 것으로, 셀 어레이의 워드라인 또는 비트라인에 접속된 셀 중에서 결함이 발생한 셀을 리페어한 후에, 리페어된 셀에서 다시 결함이 발생하게 되면 이를 여분의 리던던시 회로를 사용하여 리페어할 수 있도록 하기 위하여, 리던던트 디코더의 출력과 스페어 라인 사이에 퓨즈를 사용한 스페어 라인 디스에이블부르 구가하여 구현한 리던던시 회로에 관한 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a redundancy circuit of a semiconductor device. After repairing a defective cell among cells connected to a word line or a bit line of a cell array, if a defect occurs again in the repaired cell, the redundant redundancy circuit is replaced. In order to be repaired by using, a technology related to a redundancy circuit implemented by using a spare line disable group using a fuse between an output of a redundant decoder and a spare line is used.

Description

반도체 소자의 리던던시 회로Redundancy Circuit of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 리던던트 디코더의 실시예를 도시한 회로도,2 is a circuit diagram showing an embodiment of a redundant decoder of the present invention;

제3도는 본 발명에 사용된 리던던트 매스터 휴즈 회로도.3 is a redundant master fuse circuit diagram used in the present invention.

Claims (2)

반도체 소자의 리던던시 회로에 있어서, 리던던트 디코더의 출력과 스페어 라인 사이에 스페어 라인 디스에이블부를 포함하는 리던던트 디코더를 구현하고, 이를 이용하여 리페어된 스페어 라인의 셀에 결함이 생기면 리던던트 디코더의 출력과 스페어 라인을 분리시키고, 여분의 리던던시 회로를 사용하여 결함 셀을 다시 리페어하는 것을 특징으로 하는 리던던시 회로.In a redundancy circuit of a semiconductor device, a redundant decoder including a spare line disable unit is implemented between an output of a redundant decoder and a spare line, and when a defect occurs in a cell of a repaired spare line using the redundant decoder, the output of the redundant decoder and the spare line Redundancy and redundancy of the defective cell using the redundant redundancy circuit. 제1항에 있어서, 상기 스페어 라인 디스에이블부는, 리던던트 디코더의 출력과 스페어 라인 사이에 접속된 퓨즈와, 상기 스페어 라인과 접지전압 사이에 접속되며 항상 턴-온되어 있는 롱 채널 트랜지스터로 구성되는 것을 특징으로 하는 리던던시 회로.The spare line disable unit of claim 1, wherein the spare line disable unit comprises a fuse connected between an output of a redundant decoder and a spare line, and a long channel transistor connected between the spare line and a ground voltage and always turned on. Redundancy circuit characterized. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930029284A 1993-12-23 1993-12-23 Redundancy circuit of semiconductor memory device KR970005122B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930029284A KR970005122B1 (en) 1993-12-23 1993-12-23 Redundancy circuit of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930029284A KR970005122B1 (en) 1993-12-23 1993-12-23 Redundancy circuit of semiconductor memory device

Publications (2)

Publication Number Publication Date
KR950020752A true KR950020752A (en) 1995-07-24
KR970005122B1 KR970005122B1 (en) 1997-04-12

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ID=19372331

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930029284A KR970005122B1 (en) 1993-12-23 1993-12-23 Redundancy circuit of semiconductor memory device

Country Status (1)

Country Link
KR (1) KR970005122B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484254B1 (en) * 2002-10-31 2005-04-22 주식회사 하이닉스반도체 Redundancy circuit in semiconductor memory device and fail repair method using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484254B1 (en) * 2002-10-31 2005-04-22 주식회사 하이닉스반도체 Redundancy circuit in semiconductor memory device and fail repair method using the same

Also Published As

Publication number Publication date
KR970005122B1 (en) 1997-04-12

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