KR950015693A - Method of inspecting metal wiring film properties of semiconductor devices - Google Patents
Method of inspecting metal wiring film properties of semiconductor devices Download PDFInfo
- Publication number
- KR950015693A KR950015693A KR1019930025303A KR930025303A KR950015693A KR 950015693 A KR950015693 A KR 950015693A KR 1019930025303 A KR1019930025303 A KR 1019930025303A KR 930025303 A KR930025303 A KR 930025303A KR 950015693 A KR950015693 A KR 950015693A
- Authority
- KR
- South Korea
- Prior art keywords
- metal wiring
- wiring film
- metal
- inspecting
- film properties
- Prior art date
Links
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
본 발명은 반도체 소자의 금속배선막 특성 검사 방법에 있어서, 소자가 각각의 다이(2)로 절단될 영역인 웨이퍼(1)상의 스크라이브 라인(3)에 소정의 금속막 패턴인 금속배선막 특성 검사 패턴(4, 5, 6)을 형성하여 금속막의 선택적 제거 및 최종 열공정 완료 후 이 검사패턴(4, 5, 6)을 측정함으로써 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선막 특성 검사 방법에 관한 것으로, 각 단위 칩(chip)에 대한 개별적인 금속막의 물리적 특성을 검사할 수 있으며, 금속막 형성이후의 열공정에 의한 단선, 콘택홀 및 게이트 전극에서의 누설전류 발생, 소자의 전기적 특성에 대한 예상을 가능하게 하여 소자의 생산을 원활히 하여 주는 것과 동시에 소자의 전기적 특성을 향상시키는 효과가 있다.The present invention provides a method for inspecting metal wiring film characteristics of a semiconductor device, wherein the metal wiring film properties of a predetermined metal film pattern are examined on a scribe line 3 on the wafer 1, which is a region where the device is to be cut into each die 2. A method for inspecting metal wiring film characteristics of a semiconductor device, characterized by forming patterns (4, 5, 6) and measuring the inspection patterns (4, 5, 6) after selective removal of the metal film and completion of the final thermal process. It is possible to examine the physical characteristics of individual metal films for each unit chip, and to predict the disconnection, thermal current generation in contact holes and gate electrodes, and electrical characteristics of devices by thermal processes after metal film formation. By making it possible to facilitate the production of the device and at the same time has the effect of improving the electrical characteristics of the device.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명의 일실시예에 따라 금속배선막 특성 검사 패턴이 형성된 상태의 웨이퍼 구성도.1 is a wafer configuration in a state where the metal wiring film characteristic test pattern is formed in accordance with an embodiment of the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930025303A KR950015693A (en) | 1993-11-25 | 1993-11-25 | Method of inspecting metal wiring film properties of semiconductor devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930025303A KR950015693A (en) | 1993-11-25 | 1993-11-25 | Method of inspecting metal wiring film properties of semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950015693A true KR950015693A (en) | 1995-06-17 |
Family
ID=66825666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930025303A KR950015693A (en) | 1993-11-25 | 1993-11-25 | Method of inspecting metal wiring film properties of semiconductor devices |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950015693A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100664858B1 (en) * | 2004-12-31 | 2007-01-03 | 동부일렉트로닉스 주식회사 | Module for Inspecting Metallic Structure of Semiconductor Device |
-
1993
- 1993-11-25 KR KR1019930025303A patent/KR950015693A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100664858B1 (en) * | 2004-12-31 | 2007-01-03 | 동부일렉트로닉스 주식회사 | Module for Inspecting Metallic Structure of Semiconductor Device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR950006957A (en) | A semiconductor device manufacturing method comprising the step of forming an overlap error measurement pattern | |
US6031246A (en) | Method of producing semiconductor devices and method of evaluating the same | |
KR880014651A (en) | Test method of gate oxide on semiconductor | |
KR950015693A (en) | Method of inspecting metal wiring film properties of semiconductor devices | |
KR890003011A (en) | Integrated circuit test structure and test method to measure surface effects of layers | |
KR920005333A (en) | Semiconductor circuit manufacturing apparatus and method | |
KR100199371B1 (en) | Reticle for defect monitoring | |
KR100265841B1 (en) | Semiconductor element manufacturing process monitoring method | |
KR20050064773A (en) | A method for analyzing out a bedness of a semiconductor device | |
KR100192578B1 (en) | Pattern forming method for checking via resistance | |
JPS6333665A (en) | Contact resistance measuring pattern | |
KR100246187B1 (en) | Test pattern | |
KR20000026566A (en) | Semiconductor device and manufacturing method thereof | |
KR100204536B1 (en) | Test method of fine pattern | |
KR970053219A (en) | Semiconductor device for surface property inspection and manufacturing method thereof | |
JPS6167238A (en) | Semiconductor device | |
KR0161862B1 (en) | Probing and testing method for semiconductor device | |
KR950015580A (en) | How to make photomask for test pattern | |
JPS54159879A (en) | Production of semiconductor device | |
JPH0645423A (en) | Testing method for semiconductor device | |
KR19990048745A (en) | Wafer die inspection method | |
JPH02168642A (en) | Semiconductor integrated circuit device | |
KR940018941A (en) | Method for manufacturing contact hole of semiconductor device for monitor | |
JPS60140730A (en) | Method of detecting failure factor in manufacturing process of semiconductor element | |
JPH0321037A (en) | Method of identifying semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |