KR950010114A - Method of manufacturing thin film transistor - Google Patents
Method of manufacturing thin film transistor Download PDFInfo
- Publication number
- KR950010114A KR950010114A KR1019930017660A KR930017660A KR950010114A KR 950010114 A KR950010114 A KR 950010114A KR 1019930017660 A KR1019930017660 A KR 1019930017660A KR 930017660 A KR930017660 A KR 930017660A KR 950010114 A KR950010114 A KR 950010114A
- Authority
- KR
- South Korea
- Prior art keywords
- thin film
- amorphous semiconductor
- semiconductor layer
- forming
- gate insulating
- Prior art date
Links
Abstract
본 발명은 박막트랜지스터의 제조에 관한 것으로, 게이트절연막과 비정질반도체박막을 플라즈마를 이용하여 형성함에 따라 박막의 막질이 저하되는 것을 방지하기 위해 기판(1)상에 게이트전극(2)을 형성하는 단계와, 상기 게이트전극(2)이 형성된 기판(1)전면에 상압화학기상증착방법을 이용하여 게이트절연막(3)을 형성하는 단계, 상기 게이트절연막(3)상에 상압화학기상증착방법을 이용하여 비정질반도체층(4)을 형성하는 단계, 및 상기 결과물상에 금속을 증착하고 소정패턴으로 패터닝하여 소오스 및 드레인전극(5)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터의 제조방법을 제공한다.The present invention relates to the manufacture of a thin film transistor, the step of forming a gate electrode (2) on the substrate (1) to prevent the film quality of the thin film as the gate insulating film and the amorphous semiconductor thin film is formed by using a plasma And forming a gate insulating film 3 on the entire surface of the substrate 1 on which the gate electrode 2 is formed by using an atmospheric pressure chemical vapor deposition method, and using an atmospheric pressure chemical vapor deposition method on the gate insulating film 3. Forming an amorphous semiconductor layer (4), and forming a source and drain electrode (5) by depositing a metal on the resultant and patterning it in a predetermined pattern. to provide.
본 발명에 의하면, 상압화학기상증착방법에 의해 박막트랜지스터의 게이트절연막 및 비전질반도체박막을 형성함으로써 막질의 향상과 더불어 박막트랜지스터의 특성이 향상된다.According to the present invention, the gate insulating film and the non-semiconductor semiconductor thin film of the thin film transistor are formed by the atmospheric pressure chemical vapor deposition method to improve the film quality and the characteristics of the thin film transistor.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 박막트랜지스터 제조방법을 도시한 공정순서도,2 is a process flowchart showing a method of manufacturing a thin film transistor of the present invention;
제3도는 본 발명의 박막트랜지스터의 특성을 도시한 그래프.3 is a graph showing the characteristics of the thin film transistor of the present invention.
Claims (3)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930017660A KR950010114A (en) | 1993-09-03 | 1993-09-03 | Method of manufacturing thin film transistor |
US08/281,926 US5627089A (en) | 1993-08-02 | 1994-07-28 | Method for fabricating a thin film transistor using APCVD |
EP94401764A EP0637837A3 (en) | 1993-08-02 | 1994-08-01 | Method for fabricating a thin film transistor |
US08/731,751 US5930657A (en) | 1993-08-02 | 1996-10-18 | Method of depositing an amorphous silicon film by APCVD |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930017660A KR950010114A (en) | 1993-09-03 | 1993-09-03 | Method of manufacturing thin film transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950010114A true KR950010114A (en) | 1995-04-26 |
Family
ID=66817914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930017660A KR950010114A (en) | 1993-08-02 | 1993-09-03 | Method of manufacturing thin film transistor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950010114A (en) |
-
1993
- 1993-09-03 KR KR1019930017660A patent/KR950010114A/en not_active Application Discontinuation
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