KR950010114A - Method of manufacturing thin film transistor - Google Patents

Method of manufacturing thin film transistor Download PDF

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Publication number
KR950010114A
KR950010114A KR1019930017660A KR930017660A KR950010114A KR 950010114 A KR950010114 A KR 950010114A KR 1019930017660 A KR1019930017660 A KR 1019930017660A KR 930017660 A KR930017660 A KR 930017660A KR 950010114 A KR950010114 A KR 950010114A
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KR
South Korea
Prior art keywords
thin film
amorphous semiconductor
semiconductor layer
forming
gate insulating
Prior art date
Application number
KR1019930017660A
Other languages
Korean (ko)
Inventor
김정현
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019930017660A priority Critical patent/KR950010114A/en
Priority to US08/281,926 priority patent/US5627089A/en
Priority to EP94401764A priority patent/EP0637837A3/en
Publication of KR950010114A publication Critical patent/KR950010114A/en
Priority to US08/731,751 priority patent/US5930657A/en

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Abstract

본 발명은 박막트랜지스터의 제조에 관한 것으로, 게이트절연막과 비정질반도체박막을 플라즈마를 이용하여 형성함에 따라 박막의 막질이 저하되는 것을 방지하기 위해 기판(1)상에 게이트전극(2)을 형성하는 단계와, 상기 게이트전극(2)이 형성된 기판(1)전면에 상압화학기상증착방법을 이용하여 게이트절연막(3)을 형성하는 단계, 상기 게이트절연막(3)상에 상압화학기상증착방법을 이용하여 비정질반도체층(4)을 형성하는 단계, 및 상기 결과물상에 금속을 증착하고 소정패턴으로 패터닝하여 소오스 및 드레인전극(5)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터의 제조방법을 제공한다.The present invention relates to the manufacture of a thin film transistor, the step of forming a gate electrode (2) on the substrate (1) to prevent the film quality of the thin film as the gate insulating film and the amorphous semiconductor thin film is formed by using a plasma And forming a gate insulating film 3 on the entire surface of the substrate 1 on which the gate electrode 2 is formed by using an atmospheric pressure chemical vapor deposition method, and using an atmospheric pressure chemical vapor deposition method on the gate insulating film 3. Forming an amorphous semiconductor layer (4), and forming a source and drain electrode (5) by depositing a metal on the resultant and patterning it in a predetermined pattern. to provide.

본 발명에 의하면, 상압화학기상증착방법에 의해 박막트랜지스터의 게이트절연막 및 비전질반도체박막을 형성함으로써 막질의 향상과 더불어 박막트랜지스터의 특성이 향상된다.According to the present invention, the gate insulating film and the non-semiconductor semiconductor thin film of the thin film transistor are formed by the atmospheric pressure chemical vapor deposition method to improve the film quality and the characteristics of the thin film transistor.

Description

박막트랜지스터 제조방법Method of manufacturing thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 박막트랜지스터 제조방법을 도시한 공정순서도,2 is a process flowchart showing a method of manufacturing a thin film transistor of the present invention;

제3도는 본 발명의 박막트랜지스터의 특성을 도시한 그래프.3 is a graph showing the characteristics of the thin film transistor of the present invention.

Claims (3)

기판(1)상에 게이트전극(2)을 형성하는 단계와, 상기 게이트전극(2)이 형성된 기판(1)전면에 상압화학기상 증착방법을 이용하여 게이트절연막(3)을 형성하는 단계, 상기 게이트절연막(3)상에 상압화학기상증착방법을 이용하여 비정질반도체층(4)을 형성하는 단계, 및 상기 결과물상에 금속을 증착하고 소정패턴으로 패터닝하여 소오스 및 드레인전극(5)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 박막트랜지스터의 제조방법.Forming a gate insulating film 3 on the substrate 1 and forming a gate insulating film 3 on the entire surface of the substrate 1 on which the gate electrode 2 is formed by using an atmospheric pressure chemical vapor deposition method. Forming an amorphous semiconductor layer 4 on the gate insulating film 3 by using an atmospheric pressure chemical vapor deposition method, and depositing a metal on the resultant material and patterning the pattern in a predetermined pattern to form the source and drain electrodes 5. Method of manufacturing a thin film transistor, characterized in that comprising a step. 제1항에 있어서, 상기 비정질반도체층을 형성하는 단계후에 비정질반도체층에 수소를 확산시켜 수소처리를 행하는 단계와 상기 소오스 및 드레인전극을 형성하는 단계 후에 소오스 및 드레인전극을 형성에 의해 노출되는 상기 비정질반도체층의 채널영역 부위에 수소를 확산시키는 수소처리를 행하는 단계가 각각 더 포함되는 것을 특징으로 하는 박막트랜지스터의 제조방법.2. The method of claim 1, wherein after forming the amorphous semiconductor layer, hydrogen is diffused into the amorphous semiconductor layer to perform hydrogen treatment, and after forming the source and drain electrodes, the source and drain electrodes are exposed. A method of manufacturing a thin film transistor, characterized in that further comprising the step of performing a hydrogen treatment to diffuse hydrogen in the channel region region of the amorphous semiconductor layer. 제2항에 있어서, 상기 비정질반도체층에 대한 수소처리는 비정질반도체층과 그 하부의 게이트절연막과 계면에서의 수소농도와 계면 반대쪽의 비정질반도체층의 표면에서의 수소농도가 비정질반도체층 내부의 수소농도보다 높게 되도록 확산시키는 것을 특징으로 하는 박막트랜지스터의 제조방법.3. The hydrogen treatment of the amorphous semiconductor layer according to claim 2, wherein the hydrogen concentration at the surface of the amorphous semiconductor layer, the gate insulating film and the lower portion thereof, and the hydrogen concentration at the surface of the amorphous semiconductor layer opposite to the interface are selected from the hydrogen inside the amorphous semiconductor layer. A method of manufacturing a thin film transistor, characterized in that the diffusion to be higher than the concentration. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930017660A 1993-08-02 1993-09-03 Method of manufacturing thin film transistor KR950010114A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019930017660A KR950010114A (en) 1993-09-03 1993-09-03 Method of manufacturing thin film transistor
US08/281,926 US5627089A (en) 1993-08-02 1994-07-28 Method for fabricating a thin film transistor using APCVD
EP94401764A EP0637837A3 (en) 1993-08-02 1994-08-01 Method for fabricating a thin film transistor
US08/731,751 US5930657A (en) 1993-08-02 1996-10-18 Method of depositing an amorphous silicon film by APCVD

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930017660A KR950010114A (en) 1993-09-03 1993-09-03 Method of manufacturing thin film transistor

Publications (1)

Publication Number Publication Date
KR950010114A true KR950010114A (en) 1995-04-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930017660A KR950010114A (en) 1993-08-02 1993-09-03 Method of manufacturing thin film transistor

Country Status (1)

Country Link
KR (1) KR950010114A (en)

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