KR950007074A - Preliminary bonding method used to manufacture semiconductor package, and preliminary bonding assembly according to the method - Google Patents

Preliminary bonding method used to manufacture semiconductor package, and preliminary bonding assembly according to the method Download PDF

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Publication number
KR950007074A
KR950007074A KR1019930016783A KR930016783A KR950007074A KR 950007074 A KR950007074 A KR 950007074A KR 1019930016783 A KR1019930016783 A KR 1019930016783A KR 930016783 A KR930016783 A KR 930016783A KR 950007074 A KR950007074 A KR 950007074A
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KR
South Korea
Prior art keywords
pattern
bonding
ceramic substrate
semiconductor
semiconductor package
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KR1019930016783A
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Korean (ko)
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KR960009110B1 (en
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권흥규
윤종상
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김광호
삼성전자 주식회사
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Priority to KR93016783A priority Critical patent/KR960009110B1/en
Publication of KR950007074A publication Critical patent/KR950007074A/en
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Publication of KR960009110B1 publication Critical patent/KR960009110B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/38—Selection of media, e.g. special atmospheres for surrounding the working area

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

파워 모듈용 반도체 장치에 있어서, 반도체 소자 접합용 접합제와 히트싱크 접합용 접합제를 절연기판의 상부와 하부에 미리 형성하는 세라믹 기판의 상부의 반도체 칩 실장부와 하부의 금속 플래팅된 표면부에 접합제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법 및 그 방법에 따른 예비 접합 조립체에 관한 것으로서, 일정한 패턴을 갖는 상부패턴과 패턴을 갖지 않는 하부패턴에 직접 카파 본딩된 후 상기 상부패턴과 하부패턴의 전표면에 니켈 도금된 절연 세라믹 기판의 상부의 금속패턴 소정영역에 일정한 크기의 접합체인 솔더리본을 실장한 후, 상기 기판을 일정한 분위기를 갖는 운반노 내부를 통과시켜서 프리 솔더링하고, 상기 절연 세라믹 기판을 뒤집어서 하부 패턴의 전표면에 일정한 크기의 접합제인 솔더리본을 실장한 후 동일한 운반노 내부를 통과시켜서 프리 솔더링하도록 하였다. 이러한 프리 솔더링 구조에서는 보이드 수준이 3%이하로 감소되고, 보이드의 싸이즈도 미세하게 분포되기 때문에 파워 모듈 반도체 장치에 유용하게 적용된다.A semiconductor device for a power module, comprising: a semiconductor chip mounting portion and a lower metal plated surface portion of an upper portion of a ceramic substrate, in which a bonding agent for a semiconductor element bonding and a heat sink bonding agent are previously formed on an upper portion and a lower portion of an insulating substrate. The present invention relates to a preliminary bonding method used for manufacturing a semiconductor package for bonding a bonding agent to a preliminary bonding assembly, and to a preliminary bonding assembly according to the method, wherein the upper pattern is formed by kappa bonding directly to an upper pattern having a predetermined pattern and a lower pattern having no pattern. After mounting a solder ribbon, which is a bonded body of a certain size, on a predetermined region of the metal pattern on the upper surface of the insulated ceramic substrate nickel-plated on the entire surface of the lower pattern and the lower pattern, the substrate is pre-solded by passing through the inside of a carrying furnace having a constant atmosphere. The insulated ceramic substrate is turned upside down and a solder ribbon as a bonding agent of a predetermined size is mounted on the entire surface of the lower pattern. Was then to pre-soldering by passing through the same transport furnace. In this pre-soldering structure, the void level is reduced to less than 3%, and the size of the void is also minutely distributed, which is useful for power module semiconductor devices.

Description

반도체 패키지 제조에 이용되는 예비 접합방법 및 그 방법에 따른 예비 접합 조립체Preliminary bonding method used to manufacture semiconductor package, and preliminary bonding assembly according to the method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 이 발명에 따른 반도체 패키지 제조에 이용되는 예비 접합방법 및 그 방법에 따른 예비 접합 조립체의 단면도.2 is a cross-sectional view of a preliminary bonding method used for manufacturing a semiconductor package according to the present invention, and a preliminary bonding assembly according to the method.

제3도는 제2도를 적용한 반도체 장치의 단면도이다.3 is a cross-sectional view of the semiconductor device to which FIG. 2 is applied.

Claims (6)

니켈 도금된 반도체 기판 상부의 금속 패턴에 솔더를 로딩한 후 순수한 H2분위기를 유지하는 운반노에서 프리 솔더링하여 형성하고, 상기 니켈 도금된 반도체 기판 하부의 전표면에 솔더를 로딩한 후 동일한 분위기를 갖는 운반노에서 프리 솔더링하여 형성하는 세라믹 기판의 상부의 반도체 칩 실장부와 하부의 금속 플래팅된 표면부에 접착제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법.After the solder is loaded on the metal pattern on the nickel plated semiconductor substrate, it is formed by presoldering in a carrier furnace maintaining a pure H 2 atmosphere, and the same atmosphere after loading the solder on the entire surface of the nickel plated semiconductor substrate. A preliminary bonding method used in the manufacture of a semiconductor package for bonding an adhesive to a semiconductor chip mounting portion on an upper portion of a ceramic substrate and a metal plated surface below on a ceramic substrate formed by presoldering in a carrying furnace. 제1항에 있어서, 상기 순수한 H2분위기를 유지하는 운반노는 N2개스가 혼합된 분위기로도 대체할 수 있는 세라믹 기판의 상부의 반도체 칩 실장부와 하부의 금속 플래팅된 표면부에 접착제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법.The carrier furnace of claim 1, wherein the carrier furnace maintaining the pure H 2 atmosphere has an adhesive applied to the semiconductor chip mounting portion and the metal plated surface portion of the lower portion of the ceramic substrate, which may be replaced with a mixed atmosphere of N 2 gas. A preliminary bonding method used to manufacture a semiconductor package for bonding. 제1항에 있어서, 상기 접합제는 솔더, 금 또는 은등 접합성을 향상시킬 수 있는 물질로 될 수 있는 세라믹 기판의 상부의 반도체 칩 실장부와 하부의 금속 플래팅된 표면부에 접착제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법.The method of claim 1, wherein the bonding agent bonds an adhesive to a semiconductor chip mount on the top of the ceramic substrate and a metal plated surface on the bottom of the ceramic substrate, which may be made of a material capable of improving solderability, gold, or silver. A preliminary bonding method used for manufacturing a semiconductor package for the same. 제1항에 있어서, 상기 절연 세라믹 기판의 상부 금속패턴과 하부패턴의 전표면의 프리 솔더링은 융점을 달리하여 역으로 수행되는 세라믹 기판의 상부의 반도체 칩 실장부와 하부의 금속 플래팅된 표면부에 접착제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법.The semiconductor chip mounting part of the upper part of the ceramic substrate and the lower metal plated surface part of claim 1, wherein the pre-soldering of the entire surfaces of the upper metal pattern and the lower pattern of the insulated ceramic substrate is performed reversely with different melting points. A preliminary bonding method used in the manufacture of a semiconductor package for bonding an adhesive to a. 니켈 도금된 반도체 기판 하부의 금속 플레이트에 플럭스를 바른후 웨이브 솔더링 공정을 통하여 무전해도금으로 프리 솔더링을 행하는 공정과, 니켈 도금된 반도체 기판 하부의 전표면에 일정한 조성비를 갖는 전해조내에서 전해도금을 통하여 프리 솔더링을 행하는 공정을 구비하는 세라믹 기판의 하부의 금속 플래팅된 표면부에 접착제를 본딩하기 위한 반도체 패키지 제조에 이용되는 예비 접합방법.The flux is applied to the metal plate under the nickel plated semiconductor substrate and then pre-soldered with electroless plating through the wave soldering process. A preliminary bonding method used in the manufacture of a semiconductor package for bonding an adhesive to a metal plated surface of a lower portion of a ceramic substrate having a step of presoldering through. 일정한 패턴을 갖는 상부패턴과 패턴을 갖지 않는 하부패턴에 직접 카파 본딩된 후 상기 상부패턴과 하부패턴의 전표면에 니켈 도금된 절연 세라믹 기판에 있어서, 상기 절연 세라믹 기판의 상부의 금속패턴 소정영역에 일정한 크기의 접합제인 솔더리본을 실장하여 형성된 프리솔더부와, 상기 절연 세라믹 기판을 뒤집어서 하부 패턴의 전표면에 일정한 크기의 접합제인 솔더리본을 실장하여 형성된 프리 솔더부를 구비하여 되는 반도체 패키지 제조에 이용되는 예비 접합방법.An insulated ceramic substrate kappa-bonded directly to an upper pattern having a predetermined pattern and a lower pattern having no pattern, and then nickel-plated on all surfaces of the upper pattern and the lower pattern, wherein It is used to manufacture a semiconductor package comprising a presolder portion formed by mounting a solder ribbon, which is a constant size bonding agent, and a presolder portion formed by inverting the insulating ceramic substrate and mounting a solder ribbon, which is a uniform size bonding agent, on the entire surface of the lower pattern. Pre-bonding method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR93016783A 1993-08-27 1993-08-27 Spare unit method and assembly KR960009110B1 (en)

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Application Number Priority Date Filing Date Title
KR93016783A KR960009110B1 (en) 1993-08-27 1993-08-27 Spare unit method and assembly

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KR950007074A true KR950007074A (en) 1995-03-21
KR960009110B1 KR960009110B1 (en) 1996-07-10

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KR101508793B1 (en) * 2009-02-25 2015-04-06 한라비스테온공조 주식회사 Manufacturing method of heat exchanger using thermoelectric module

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