KR950004856B1 - Data transmitiing circuit - Google Patents
Data transmitiing circuitInfo
- Publication number
- KR950004856B1 KR950004856B1 KR92022965A KR920022965A KR950004856B1 KR 950004856 B1 KR950004856 B1 KR 950004856B1 KR 92022965 A KR92022965 A KR 92022965A KR 920022965 A KR920022965 A KR 920022965A KR 950004856 B1 KR950004856 B1 KR 950004856B1
- Authority
- KR
- South Korea
- Prior art keywords
- sense amplifier
- data
- circuit
- predetermined
- cell data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920022965D KR960000892B1 (ko) | 1992-12-01 | 1992-12-01 | 데이타 전송회로 |
KR92022965A KR950004856B1 (en) | 1992-12-01 | 1992-12-01 | Data transmitiing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92022965A KR950004856B1 (en) | 1992-12-01 | 1992-12-01 | Data transmitiing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940016234A KR940016234A (ko) | 1994-07-22 |
KR950004856B1 true KR950004856B1 (en) | 1995-05-15 |
Family
ID=19344429
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92022965A KR950004856B1 (en) | 1992-12-01 | 1992-12-01 | Data transmitiing circuit |
KR1019920022965D KR960000892B1 (ko) | 1992-12-01 | 1992-12-01 | 데이타 전송회로 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920022965D KR960000892B1 (ko) | 1992-12-01 | 1992-12-01 | 데이타 전송회로 |
Country Status (1)
Country | Link |
---|---|
KR (2) | KR950004856B1 (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100370952B1 (ko) * | 1995-12-31 | 2003-03-28 | 주식회사 하이닉스반도체 | 메모리 셀의 센스앰프 회로 |
KR20000019073A (ko) * | 1998-09-08 | 2000-04-06 | 윤종용 | 인접 비트라인간 누화 잡음을 개선한 반도체메모리장치 |
JP2003196982A (ja) * | 2001-12-27 | 2003-07-11 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100510737B1 (ko) * | 2002-06-29 | 2005-08-30 | 매그나칩 반도체 유한회사 | 반도체 메모리 장치 |
KR100512168B1 (ko) * | 2002-09-11 | 2005-09-02 | 삼성전자주식회사 | 미소 전압차를 감지하는 감지증폭기 및 감지 증폭 방법 |
-
1992
- 1992-12-01 KR KR92022965A patent/KR950004856B1/ko not_active IP Right Cessation
- 1992-12-01 KR KR1019920022965D patent/KR960000892B1/ko active
Also Published As
Publication number | Publication date |
---|---|
KR940016234A (ko) | 1994-07-22 |
KR960000892B1 (ko) | 1996-01-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW324122B (en) | Noise isolated I/O buffer | |
CA2177999A1 (en) | Reducing Crosstalk Connector | |
MY100970A (en) | Semiconductor memory device | |
JPS6457494A (en) | Semiconductor memory device | |
TW324799B (en) | MOS termination for low power signaling | |
ES2015817A6 (es) | Elemento de conmutacion para comunicaciones. | |
EP0513611A3 (ko) | ||
MY112116A (en) | A bidirectional amplifier. | |
KR900004345B1 (en) | Semiconductor memory device | |
KR900015156A (ko) | 다이나믹 ram의 판독 회로 | |
KR950004856B1 (en) | Data transmitiing circuit | |
WO1988001079A3 (en) | Signal processing | |
EP0186051A3 (en) | Integrated semiconductor memory | |
TW329522B (en) | The semiconductor memory device | |
IL109798A (en) | Non-inverter circuit | |
MY103949A (en) | Serial data transfer circuit for a semiconductor memory device | |
MY103940A (en) | Semiconductor memory capable of improving data rewrite speed | |
TW344822B (en) | I/O bias circuit insensitive to inadvertent power supply variations for MOS memory | |
TW362213B (en) | Semiconductor memory apparatus | |
HK1001178A1 (en) | Circuit for the buffer storage of a bit and use of the circuit as an address buffer store | |
TW330289B (en) | Synchronous semiconductor memory device | |
JPS5634184A (en) | Semiconductor memory | |
JPS6435795A (en) | Semiconductor memory circuit | |
JPS52144253A (en) | Flip-flop circuit | |
MY102018A (en) | A memory device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application | ||
J2X1 | Appeal (before the patent court) |
Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL |
|
G160 | Decision to publish patent application | ||
B701 | Decision to grant | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20011207 Year of fee payment: 7 |
|
LAPS | Lapse due to unpaid annual fee |