KR940020581A - Bipolar Device Manufacturing Method - Google Patents
Bipolar Device Manufacturing Method Download PDFInfo
- Publication number
- KR940020581A KR940020581A KR1019930001579A KR930001579A KR940020581A KR 940020581 A KR940020581 A KR 940020581A KR 1019930001579 A KR1019930001579 A KR 1019930001579A KR 930001579 A KR930001579 A KR 930001579A KR 940020581 A KR940020581 A KR 940020581A
- Authority
- KR
- South Korea
- Prior art keywords
- capacitor
- bipolar device
- metal
- front surface
- nitride film
- Prior art date
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
본 발명은 바이폴라 소자 제조 방법에 관한 것으로서 특히 질화막(Si3N4)필름을 이용하여 단위소자 특성변화를 최소화하여 고신뢰도의 바이폴라 소자의 캐피시터 제조에 적당하도록 한 바이폴라 소자 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar device manufacturing method, and more particularly, to a method of manufacturing a bipolar device suitable for manufacturing a capacitor of a high reliability bipolar device using a nitride film (Si 3 N 4 ) film by minimizing changes in unit device characteristics.
이를 위하여 반도체 기판(1)에 매입층(2)과 에피층(3) 및 필드 격리막(4)이 형성된 바이폴라 소자 제조방법에 있어서, 상기 에피층(3)위에 에미터 이온(5)주입을 실시한 다음 전면에 절연막(6)을 형성하는 단계와, 상기 단계 후 캐피시터가 형성될 영역을 정의 한 다음 상기 캐패시터 영역에 존재하는 절연막(6)을 디파인(Define)하고 전면에 질화막 필름(7)을 도포하는 단계와, 상기 캐패시터 영역 이외의 부분에 존재하는 질화막 필름(7)을 포토 에치하여 제거 하는 단계와, 상기 단계 후 2단 확산시켜 에미터 접합부(8)를 형성시키는 단계와, 상기 절연막(6)의 소정 부분만을 포토 에치하여 콘택을 형성하고, 전면에 금속(9)을 증착하는 단계와, 상기 금속(9)을 포토 에치하여 필요한 부분의 금속(9)만을 잔여 시키는 단계를 포함하여서 된 것이다.To this end, in the bipolar device manufacturing method in which the buried layer 2, the epi layer 3, and the field isolation layer 4 are formed on the semiconductor substrate 1, the emitter ion 5 is injected onto the epi layer 3; Next, a step of forming an insulating film 6 on the front surface and a region where a capacitor is to be formed after the step are defined, and then the insulating film 6 existing in the capacitor area is defined and the nitride film 7 is coated on the front surface. And photoetching and removing the nitride film 7 present in the portion other than the capacitor region, and diffusing two stages to form the emitter junction 8 after the step; Photo-etching only a predetermined portion of the photovoltaic layer to form a contact, depositing a metal (9) on the front surface, and leaving only the metal (9) of the required portion by photo-etching the metal (9). .
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 바이폴라 소자의 제조 공정도.2 is a manufacturing process diagram of a bipolar device according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930001579A KR940020581A (en) | 1993-02-05 | 1993-02-05 | Bipolar Device Manufacturing Method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930001579A KR940020581A (en) | 1993-02-05 | 1993-02-05 | Bipolar Device Manufacturing Method |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940020581A true KR940020581A (en) | 1994-09-16 |
Family
ID=66866271
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930001579A KR940020581A (en) | 1993-02-05 | 1993-02-05 | Bipolar Device Manufacturing Method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940020581A (en) |
-
1993
- 1993-02-05 KR KR1019930001579A patent/KR940020581A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR960019649A (en) | Manufacturing Method of Semiconductor Device | |
SE9803767D0 (en) | Method for semiconductor manufacturing | |
KR890011097A (en) | Manufacturing Method of Semiconductor Device | |
ATE19712T1 (en) | METHOD OF MAKING AN INSULATION LAYER BETWEEN METALLIZATION LEVELS OF SEMICONDUCTOR INTEGRATED CIRCUITS. | |
KR940020581A (en) | Bipolar Device Manufacturing Method | |
KR960026459A (en) | Transistor Manufacturing Method | |
KR970054349A (en) | Method for manufacturing symmetric bipolar transistor | |
KR890005885A (en) | Manufacturing method of bipolar transistor | |
KR950009914A (en) | Method for forming source / drain junction of semiconductor device | |
KR940022895A (en) | Bipolar Transistor Manufacturing Method | |
KR960009015A (en) | Gate electrode formation method of semiconductor device | |
KR900001030A (en) | High voltage semiconductor device and manufacturing method thereof | |
KR910005441A (en) | Buried contact formation method using silicide | |
KR970052785A (en) | Semiconductor device manufacturing method | |
KR970053807A (en) | Junction Capacitor Using Bipolar Transistor Structure and Its Manufacturing Method | |
KR950007030A (en) | Metal wiring formation method of semiconductor device | |
KR960035918A (en) | Shallow Junction Formation Method of Semiconductor Devices | |
KR960026179A (en) | Contact structure and contact formation method of semiconductor device | |
KR970052942A (en) | Reduction of Parasitic Capacitance at Intersection of Metallization in Integrated Circuits Using Heterojunctions | |
KR920015450A (en) | Device isolation method of semiconductor device | |
KR970054494A (en) | Contact Forming Method of Semiconductor Device | |
KR970054050A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR920013625A (en) | Ion Implantation Method of Semiconductor Device | |
KR960026973A (en) | Method of manufacturing thin film transistor | |
KR960039420A (en) | How to manufacture 3-pole field emitter |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |