KR940016946A

KR940016946A - Gate electrode formation method using T-type polycide structure

Info

Publication number: KR940016946A
Application number: KR1019920026916A
Authority: KR
Inventors: 박상훈
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1992-12-30
Filing date: 1992-12-30
Publication date: 1994-07-25

Abstract

본 발명은 반도체 기판(21) 상부에 필드 산화막(22)을 형성한 후에 상기 필드 산화막(22) 상부에 제 1 전도체(23), 제 1 절연층(24)을 순차적으로 형성하고 사진 식각법으로 소정 부위를 제거하여 홈을 형성하는 제 1 단계, 상기 제 1 단계 후에 상기 제 1 절연층(24)과 반도체 기판(21) 상부에 제 2 절연층(25), 제 2 전도체(26) 및 제 3 전도체(27)를 순차적으로 형성하는 제 2 단계, 상기 제 2 단계 후에 사진 식각법으로 소정 부위를 식각하여 게이트 전극을 형성한 후에 제1,2불순물 이온 주입을 실시하여 N^-영역(28)과 N⁺영역(29)을 형성하여 LDD구조를 형성하는 제 3 단계를 포함하여 이루어지는 것을 특징으로 한다.According to the present invention, after the field oxide layer 22 is formed on the semiconductor substrate 21, the first conductor 23 and the first insulating layer 24 are sequentially formed on the field oxide layer 22. A first step of removing a predetermined portion to form a groove, and after the first step, a second insulating layer 25, a second conductor 26, and a second insulating layer on the first insulating layer 24 and the semiconductor substrate 21. After the second step of sequentially forming the three conductors 27, the gate electrode is formed by etching a predetermined portion by the photolithography method after the second step, and then performing first and second impurity ion implantation to perform N ^- region 28. And a third step of forming an N ⁺ region 29 to form an LDD structure.

Description

Gate electrode formation method using T-type polycide structure

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2 도는 본 발명에 따른 T형 게이트 전극 제조 공정도.2 is a process diagram of manufacturing a T-type gate electrode according to the present invention.

Claims

In the method of forming a T-type gate electrode of a semiconductor device, after the field oxide film 22 is formed on the semiconductor substrate 21, the first conductor 23 and the first insulating layer 24 are formed on the field oxide film 22. To form a groove by sequentially forming and removing a predetermined portion by a photolithography method, and after the first step, the second insulating layer 25 on the first insulating layer 24 and the semiconductor substrate 21. And a second step of sequentially forming the second conductor 26 and the third conductor 27, and implanting first and second impurity ions after etching the predetermined portion by photolithography after the second step to form a gate electrode. And forming a N ^- region (28) and an N ⁺ region (29) to form an LDD structure.

The method of claim 1, wherein the first conductor (23) and the second conductor (26) are polysilicon doped with impurities.

A method for forming a T-type gate electrode according to claim 1, wherein said third semiconductor (27) is a transition metal film.

The method of claim 1, wherein the first insulating layer (24) is a low temperature oxide film and the second insulating layer (25) is a thermal oxide film.

※ Note: The disclosure is based on the initial application.