KR940016891A - Transistors and manufacturing method thereof - Google Patents
Transistors and manufacturing method thereof Download PDFInfo
- Publication number
- KR940016891A KR940016891A KR1019920023432A KR920023432A KR940016891A KR 940016891 A KR940016891 A KR 940016891A KR 1019920023432 A KR1019920023432 A KR 1019920023432A KR 920023432 A KR920023432 A KR 920023432A KR 940016891 A KR940016891 A KR 940016891A
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- insulating film
- manufacturing
- gate
- source
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 238000000034 method Methods 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 3
- 239000004065 semiconductor Substances 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- 230000002411 adverse Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 새로운 트랜지스터 구조 및 이의 제조방법에 관한 것으로, 고집적화에 따라 트랜지스터의 크기가 급격히 감소되면서 발생하는 문제점을 해결하기 위해 채널영역의 표면에 굴곡을 만들어 유효 채널길이를 증가시켜 펀치스루등과 같은 소자에 미치는 악영향을 방지하는 트랜지스터 구조와 이의 제조방법을 제공한다.The present invention relates to a novel transistor structure and a method of manufacturing the same, to solve the problem caused by the rapid decrease in the size of the transistor in accordance with high integration to make the bend on the surface of the channel region to increase the effective channel length, such as punch-through Provided are a transistor structure and a method of manufacturing the same that prevent adverse effects on the device.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 4 도 내지 제 7 도는 본 발명에 의한 MOS트랜지스터의 제조방법을 나타낸 공정순서도.4 to 7 are process flowcharts showing a method of manufacturing a MOS transistor according to the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920023432A KR950008258B1 (en) | 1992-12-05 | 1992-12-05 | Transistor and its making method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920023432A KR950008258B1 (en) | 1992-12-05 | 1992-12-05 | Transistor and its making method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940016891A true KR940016891A (en) | 1994-07-25 |
KR950008258B1 KR950008258B1 (en) | 1995-07-26 |
Family
ID=19344834
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920023432A KR950008258B1 (en) | 1992-12-05 | 1992-12-05 | Transistor and its making method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950008258B1 (en) |
-
1992
- 1992-12-05 KR KR1019920023432A patent/KR950008258B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950008258B1 (en) | 1995-07-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20060630 Year of fee payment: 12 |
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LAPS | Lapse due to unpaid annual fee |