KR940016688A - Metal wiring formation method of semiconductor device - Google Patents

Metal wiring formation method of semiconductor device Download PDF

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Publication number
KR940016688A
KR940016688A KR1019920024316A KR920024316A KR940016688A KR 940016688 A KR940016688 A KR 940016688A KR 1019920024316 A KR1019920024316 A KR 1019920024316A KR 920024316 A KR920024316 A KR 920024316A KR 940016688 A KR940016688 A KR 940016688A
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KR
South Korea
Prior art keywords
exposure
film
metal wiring
forming
semiconductor device
Prior art date
Application number
KR1019920024316A
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Korean (ko)
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KR960001177B1 (en
Inventor
최영규
양전욱
조낙희
최성우
Original Assignee
양승택
재단법인 한국전자통신연구소
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Application filed by 양승택, 재단법인 한국전자통신연구소 filed Critical 양승택
Priority to KR1019920024316A priority Critical patent/KR960001177B1/en
Publication of KR940016688A publication Critical patent/KR940016688A/en
Application granted granted Critical
Publication of KR960001177B1 publication Critical patent/KR960001177B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 화합물 반도체 장치의 금속배선을 형성하는 방법에 관한 것으로, 반도체 기판상에 절연막과 노광막을 순차로 도포한 후 초벌구이에 의해 노광막을 건조시키고, 노광 및 현상에 의해 노광막의 패턴을 형성한 후 이를 마스크로서 사용하여 절연막에 홈을 형성하고, 금속을 증착하여 금속선을 형성하는 금속배선 형성방법에 있어서, 금속선 두께의 적어도 2배 이상의 두께로 노광막을 도포하는 것을 특징으로 한다.The present invention relates to a method for forming a metal wiring of a compound semiconductor device, and after applying an insulating film and an exposure film sequentially on a semiconductor substrate, the exposure film is dried by baking, and the pattern of the exposure film is formed by exposure and development. A metal wiring forming method in which a groove is formed in an insulating film by using this as a mask, and metal is deposited to form a metal line, characterized in that an exposure film is applied to a thickness of at least two times the thickness of the metal line.

Description

반도체 장치의 금속배선 형성방법Metal wiring formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2 도의 (a) 내지 (e)는 본 발명에 따른 금속배선 형성 단면도.2 (a) to (e) are cross-sectional views of metal wire formation according to the present invention.

Claims (5)

반도체 기판(1)상에 절연막(2)과 노광막(3)을 순차로 도포한 후 초벌구이에 의해 상기 노광막(3)을 건조시키고, 노광 및 현상에 의해 상기 노광막(3)의 패턴을 형성한 후 이를 마스크로서 사용하여 상기 절연막(2)에 홈(7)을 형성하고, 금속을 증착하여 금속선(15)을 형성하는 금속배선 형성방법에 있어서, 상기 금속선(15) 두께의 적어도 2배 이상의 두께로 상기 노광막(3)을 도포하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.After applying the insulating film 2 and the exposure film 3 on the semiconductor substrate 1 sequentially, the exposure film 3 is dried by baking and the pattern of the exposure film 3 is exposed by exposure and development. In the metal wiring forming method of forming a groove (7) in the insulating film (2) and forming a metal wire 15 by using a metal after forming the mask, at least twice the thickness of the metal wire (15) The exposure film (3) is apply | coated to the above thickness, The metal wiring formation method of the semiconductor device characterized by the above-mentioned. 제 1 항에 있어서, 상기 노광막(3)은 회전 코팅기의 회전속도를 1000~2000rpm으로 하여 도포되는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein the exposure film (3) is applied by applying a rotational speed of the rotary coating machine at 1000 to 2000 rpm. 제 1 항에 있어서, 상기 노광막(3)의 초벌구이는 상기 노광막(3)이 녹기 시작하는 유리전이온도 보다 약간 낮은 소정의 온도에서 수행되는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.2. The method of forming a metal wiring of a semiconductor device according to claim 1, wherein the first baking of said exposure film (3) is performed at a predetermined temperature slightly lower than the glass transition temperature at which said exposure film (3) starts to melt. 제 1 항에 있어서, 상기 홈(7)을 형성하기 위해 상기 절연막(2)을 식각할때 상기 노광막(3)과 상기 절연막(2)의 식각선택비가 3:1이하가 되도록 하는 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.The method of claim 1, wherein when the insulating film 2 is etched to form the groove 7, the etching selectivity of the exposure film 3 and the insulating film 2 is less than 3: 1. A metal wiring forming method of a semiconductor device. 제 1 항에 있어서, 상기 금속선(15)은 상기 절연막(2)보다 약 20%정도 더 두꺼운 것을 특징으로 하는 반도체 장치의 금속배선 형성방법.2. The method of claim 1 wherein the metal line (15) is about 20% thicker than the insulating film (2). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920024316A 1992-12-15 1992-12-15 Manufacturing method of metal wiring of semiconductor device KR960001177B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920024316A KR960001177B1 (en) 1992-12-15 1992-12-15 Manufacturing method of metal wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920024316A KR960001177B1 (en) 1992-12-15 1992-12-15 Manufacturing method of metal wiring of semiconductor device

Publications (2)

Publication Number Publication Date
KR940016688A true KR940016688A (en) 1994-07-23
KR960001177B1 KR960001177B1 (en) 1996-01-19

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ID=19345618

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920024316A KR960001177B1 (en) 1992-12-15 1992-12-15 Manufacturing method of metal wiring of semiconductor device

Country Status (1)

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KR (1) KR960001177B1 (en)

Also Published As

Publication number Publication date
KR960001177B1 (en) 1996-01-19

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