KR940015672A - Polysilicon pattern forming method using three-layer photoresist - Google Patents

Polysilicon pattern forming method using three-layer photoresist Download PDF

Info

Publication number
KR940015672A
KR940015672A KR1019920026708A KR920026708A KR940015672A KR 940015672 A KR940015672 A KR 940015672A KR 1019920026708 A KR1019920026708 A KR 1019920026708A KR 920026708 A KR920026708 A KR 920026708A KR 940015672 A KR940015672 A KR 940015672A
Authority
KR
South Korea
Prior art keywords
pattern
layer
photoresist
film
polysilicon
Prior art date
Application number
KR1019920026708A
Other languages
Korean (ko)
Inventor
김진웅
김명선
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019920026708A priority Critical patent/KR940015672A/en
Publication of KR940015672A publication Critical patent/KR940015672A/en

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

본 발명은 반도체 소자의 삼층감광막을 이용한 폴리실리콘 패턴 형성방법에 관한것으로, 삼층감광막의 중간층 패턴 제거시 하부감광막패턴의 들림현상을 방지하고, 하부감광막패턴의 입체크기가 변화되는 것을 방지하기 위해 중간층패턴을 제거하지 않은 상태에서 하부의 폴리실리콘층을 식각하거나 폴리실리콘층 상부에 얇은 두께의 옥사이드막 또는 실리콘 나이트라이드막을 형성한후 공지의 기술로 삼층감광막패턴 공정을 진행하고, 폴리실리콘층 패턴을 형성하는 기술이다.The present invention relates to a polysilicon pattern forming method using a three-layer photosensitive film of a semiconductor device, to prevent the lifting phenomenon of the lower photosensitive film pattern when removing the intermediate layer pattern of the three-layer photosensitive film, and to prevent the three-dimensional size of the lower photosensitive film pattern to change After removing the pattern, the lower polysilicon layer is etched or a thin oxide film or silicon nitride film is formed on the polysilicon layer, and then a three-layer photoresist pattern process is performed by a known technique. It is a technique to form.

Description

삼층감광막을 이용한 폴리실리콘 패턴 형성방법Polysilicon pattern forming method using three-layer photoresist

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 제1실시예에 의해 폴리실리콘층 패턴을 형성한 단면도, 제3도는 본 발명의 제2실시예에 의해 폴리실리콘층 패턴을 형성한 단면도.2 is a cross-sectional view of forming a polysilicon layer pattern according to a first embodiment of the present invention, and FIG. 3 is a cross-sectional view of forming a polysilicon layer pattern according to a second embodiment of the present invention.

Claims (2)

삼층감광막을 이용한 폴리실리콘층 패턴 형성방법에 있어서, 폴리실리콘층 상부에 삼층감광막의 중간층패턴과 하부감광막패턴을 공지의 기술로 형성하는 단계와, 중간층팬턴을 마스크로 하여 하부 폴리실리콘층을 식각하여 폴리실리콘층 패턴을 형성하는 단계와, 중간층패턴과 하부감광막패턴을 리프트-오프방법으로 동시에 제거하는 단계로 이루어지는 것을 특징으로 하는 삼층감광막을 이용한 폴리실리콘층 패턴 형성방법.In the method of forming a polysilicon layer pattern using a three-layer photoresist film, forming a middle layer pattern and a lower photoresist pattern of the three-layer photosensitive film on the polysilicon layer by a known technique, and etching the lower polysilicon layer by using the intermediate layer mask as a mask Forming a polysilicon layer pattern, and simultaneously removing the intermediate layer pattern and the lower photoresist pattern by a lift-off method. 삼층감광막을 이용한 폴리실리콘층 패턴 형성방법에 있어서, 삼층감광막의 중간층패턴 제거시 하부감광막의 들림현상을 방지하기 위하여, 패턴하고자 하는 폴리실리콘층 상부에 얇은 두께의 옥사이드막 또는 나이트라이드막을 증착하는 단계와, 그 상부에 삼층감광막을 적층하고, 공지의 기술로 중간층패턴과 하부감광막패턴을 형성하는 단계와, 중간층패턴을 습식용액에서 제거한후, 하부감광막패턴을 마스크로 하여 옥사이드막 또는 나이트라이드막을 식각하고, 그 하부의 폴리실리콘층을 식각하여 하부감광막패턴을 형성하는 단계로 이루어지는 것을 특징으로 하는 삼층감광막을 이용한 폴리실리콘층 패턴 형성방법.In the method of forming a polysilicon layer pattern using a three-layer photoresist, depositing a thin oxide film or a nitride film on the polysilicon layer to be patterned in order to prevent the lower photoresist from lifting when the intermediate layer pattern of the three-layer photoresist is removed. And laminating a three-layer photoresist film thereon, forming an intermediate layer pattern and a lower photoresist pattern by a known technique, removing the intermediate layer pattern from a wet solution, and etching the oxide film or nitride film using the lower photoresist pattern as a mask. And etching the lower polysilicon layer to form a lower photosensitive film pattern. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920026708A 1992-12-30 1992-12-30 Polysilicon pattern forming method using three-layer photoresist KR940015672A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920026708A KR940015672A (en) 1992-12-30 1992-12-30 Polysilicon pattern forming method using three-layer photoresist

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920026708A KR940015672A (en) 1992-12-30 1992-12-30 Polysilicon pattern forming method using three-layer photoresist

Publications (1)

Publication Number Publication Date
KR940015672A true KR940015672A (en) 1994-07-21

Family

ID=67214876

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920026708A KR940015672A (en) 1992-12-30 1992-12-30 Polysilicon pattern forming method using three-layer photoresist

Country Status (1)

Country Link
KR (1) KR940015672A (en)

Similar Documents

Publication Publication Date Title
KR0122315B1 (en) Micro-patterning method of semiconductor
KR940015672A (en) Polysilicon pattern forming method using three-layer photoresist
KR890004415A (en) Device Separation Method of Semiconductor Device
KR950007056A (en) Device isolation oxide film formation method of semiconductor device
KR970003559A (en) Method of forming fine pattern of semiconductor device
KR950012677A (en) Field oxide film formation method of a semiconductor device
KR950004408A (en) Polysilicon Pattern Formation Method of Semiconductor Device
KR940016887A (en) Method of forming fine gate electrode of semiconductor device
KR950021367A (en) Device Separation Method of Semiconductor Device
KR960026557A (en) Semiconductor device and manufacturing method
KR970054086A (en) Manufacturing Method of Semiconductor Unit Device
KR900015320A (en) Trench fine pattern formation method
KR970018080A (en) Contact Forming Method of Semiconductor Device
KR970052415A (en) Contact formation method of a semiconductor device using a double insulating film
KR960026610A (en) Field oxide film formation method of semiconductor device
KR960026303A (en) Fine pattern formation method
KR980003891A (en) Manufacturing method of alignment key for exposure
KR970054532A (en) Device Separation Method of Semiconductor Device
KR940009770A (en) Silicide layer / polysilicon layer etching method
KR940016470A (en) Method for forming contact hole with inclined surface
KR950021400A (en) Field oxide film manufacturing method
KR950021075A (en) Method for forming contact hole in semiconductor device
KR970053430A (en) Device Separation Method of Semiconductor Device Using SEPOX Method
KR950019917A (en) Poly Silicon Film Etching Method
KR940010199A (en) Reverse contact manufacturing method of semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application