KR940010809A - Receiving Buffer Device in Video Conference Video Codem System - Google Patents

Receiving Buffer Device in Video Conference Video Codem System Download PDF

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Publication number
KR940010809A
KR940010809A KR1019920018914A KR920018914A KR940010809A KR 940010809 A KR940010809 A KR 940010809A KR 1019920018914 A KR1019920018914 A KR 1019920018914A KR 920018914 A KR920018914 A KR 920018914A KR 940010809 A KR940010809 A KR 940010809A
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KR
South Korea
Prior art keywords
video
buffer
channel
receiving buffer
decoder
Prior art date
Application number
KR1019920018914A
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Korean (ko)
Inventor
한성택
Original Assignee
정장호
금성정보통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 정장호, 금성정보통신 주식회사 filed Critical 정장호
Priority to KR1019920018914A priority Critical patent/KR940010809A/en
Publication of KR940010809A publication Critical patent/KR940010809A/en

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Abstract

본 발명은 채널 등급에 따라 수신 버퍼 크기를 가변 조절 할 수 있도록 함으로써 버퍼 신호전송 지연 시간을 다측 시켜 신호 전송 속도를 향상 시키도록한 화상회의 비디오 코텍 시스템에서의 수신버퍼 장치에 관한 것이다.The present invention relates to a receiving buffer device in a videoconferencing video codec system that improves signal transmission speed by multiplying a buffer signal transmission delay time by allowing a variable control of a receiving buffer size according to a channel grade.

이를 위하여 본 발명은 수신 버퍼 장치의 크기를 채널 등급에 따라 가변 조절 할 수 있도록 하여 버퍼 지연시간을 최대한 단축 시키고자 한 것이다.To this end, the present invention is intended to shorten the buffer delay time by allowing the size of the receiving buffer device to be adjusted according to the channel grade.

Description

화상회의 비디오 코뎀 시스템에서의 수신 버퍼 장치Receiving Buffer Device in Video Conference Video Codem System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 CCITT H.261에 근거한 비도오 코텍 송, 수신 블럭 구성도,1 is a block diagram of a video codec transmission and reception block based on CCITT H.261,

제2도는 본 발명에 따른 수신 버퍼 수단의 블럭 구성도,2 is a block diagram of a receiving buffer means according to the present invention;

제3도는 본 발명에서 수신 버퍼 콘트롤링 수단의 블럭 구성도,3 is a block diagram of a receiving buffer controlling means in the present invention;

제4돈 본 발명에서 채널 등급(Channel Rate)에 따른 수신 버퍼 크기를 나타낸 것으로서, (가)는 채널 등급이 64KbPS*N인 경우, (나)는 채널 등급이 36KbPS*N인 경우이다.Fourth money In the present invention, the receiving buffer size according to the channel rate (Channel Rate), (a) is the case of the channel grade is 64KbPS * N, (b) is the case of the channel grade is 36KbPS * N.

Claims (2)

화상회의 비디오 코덱 수신부를 형성하는 송신 디코더(1)와 비디오 복조 디코더(3)사이에 연결되어 채널 등급에 따라 가변적으로 버퍼의 크기를 조절하기 위하여 다수의 직렬/병렬 FIFO(201,....20N)로 구성된 수신 버퍼수단(20)과, 상기 수신버퍼수단(20)의 동작을 제어하기 위하여 채널에서 입력되는 채널 등급(CR)을 디코딩하는 채널등급 디코더(301)와, 진체적인 직렬/병렬 FIFO(201,.....20N)의 데이타 입력상태를 판별하는 수신 버퍼 상태 판별부(302)와, 상기 채널 등급 디코더(301)와 수신버퍼 상태 판별부(302)의 출력을 입력받아 수신 버퍼크기를 결정하여 다수의 직렬/병렬 FIFO(201,....20N)의 연결 상태를 결정하는 수신 버퍼 크기 결정부(303)와, 비디오 복조디코더(3)에서 데이타 배리드 신호(VS)와 데이타 채널 클럭(CC) 및 시스템 클럭(SC)을 입력받아 상기 수신 버퍼 수단(20)의 판독신호(R)와 직렬 입력 클럭 펄스 신호(SICP)를 생성하는 수신 버퍼 제어 신호 생성부(304)로 구성된 수신 버퍼 콘트롤링 수단(30)을 구비함을 특징으로 하는 화상 회의 비디오 코뎀 시스템에서의 수신버퍼장치.A plurality of serial / parallel FIFOs (201, ...) are connected between the transmission decoder (1) and the video demodulation decoder (3) forming the videoconferencing video codec receiver to adjust the size of the buffer variably according to the channel grade. A receiving buffer means 20 composed of 20N, a channel grade decoder 301 for decoding a channel grade (CR) input from a channel for controlling the operation of the receiving buffer means 20, and a serial / parallel parallel Receives and receives the output of the reception buffer state determination unit 302 and the channel class decoder 301 and the reception buffer state determination unit 302 for determining the data input state of the FIFOs 201, 20 ... 20N. A data buffer signal VS in the video demodulation decoder 3 and a reception buffer size determiner 303 which determines a buffer size to determine a connection state of a plurality of serial / parallel FIFOs 201,... 20N. The number of receive buffers by receiving a data channel clock (CC) and a system clock (SC); Video conferencing video, characterized in that it comprises a receiving buffer control means 30 composed of a receiving buffer control signal generator 304 for generating a read signal R of 20 and a serial input clock pulse signal SICP. Receiving buffer device in a codem system. 제1항에 있어서, 상기 채널 등급 디코더(301)에 입력되는 채널 등급(CR)을 64Kbps*N 또는 56Kbps*N로 설정함을 특징으로 하는 화상 회의 수신버퍼장치.2. The video conference receiving buffer device according to claim 1, wherein the channel grade (CR) input to the channel grade decoder (301) is set to 64 Kbps * N or 56 Kbps * N. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920018914A 1992-10-14 1992-10-14 Receiving Buffer Device in Video Conference Video Codem System KR940010809A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920018914A KR940010809A (en) 1992-10-14 1992-10-14 Receiving Buffer Device in Video Conference Video Codem System

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920018914A KR940010809A (en) 1992-10-14 1992-10-14 Receiving Buffer Device in Video Conference Video Codem System

Publications (1)

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KR940010809A true KR940010809A (en) 1994-05-26

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100585932B1 (en) * 2001-08-29 2006-06-01 한국전자통신연구원 Apparatus and method for transmitting dynamic rt-VBR data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100585932B1 (en) * 2001-08-29 2006-06-01 한국전자통신연구원 Apparatus and method for transmitting dynamic rt-VBR data

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