KR940004794A - Tab package - Google Patents

Tab package Download PDF

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Publication number
KR940004794A
KR940004794A KR1019920014391A KR920014391A KR940004794A KR 940004794 A KR940004794 A KR 940004794A KR 1019920014391 A KR1019920014391 A KR 1019920014391A KR 920014391 A KR920014391 A KR 920014391A KR 940004794 A KR940004794 A KR 940004794A
Authority
KR
South Korea
Prior art keywords
tab package
base film
semiconductor chip
metal wiring
package
Prior art date
Application number
KR1019920014391A
Other languages
Korean (ko)
Other versions
KR950003906B1 (en
Inventor
윤종상
윤진현
박범열
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920014391A priority Critical patent/KR950003906B1/en
Publication of KR940004794A publication Critical patent/KR940004794A/en
Application granted granted Critical
Publication of KR950003906B1 publication Critical patent/KR950003906B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container

Abstract

베이스 필름의 상부에 금속 배선이 형성되어 있는 테이프 케리어상에 반도체 칩이 실장되는 탭 패키지에서, 상기 탭 패키지의 금속 배선의 내부 리이드와 외부 리이드 사이의 베이스 필름을 소정부분 제거하여 절곡용 슬리트를 형성하여 상기 금속 배선이 노출되도록 하였다. 반도체 칩 실장시 상기 절곡용 슬리트로 노출된 금속 배선을 S자 또는 J자 형상등으로 절곡한 후, 상기 금속 배선의 내측과 상기 반도테 칩의 측면에 절연 수지를 개재시켜 접착하였다.In a tab package in which a semiconductor chip is mounted on a tape carrier having a metal wiring formed on the base film, a portion of the base film between the inner lead and the outer lead of the metal wiring of the tab package is removed to remove the bending slits. Formed to expose the metal wiring. The metal wires exposed by the bending slits were bent in S-shape or J-shape or the like when the semiconductor chip was mounted, and then bonded to the inside of the metal wires and the side surface of the bandote chip through an insulating resin.

따라서 상기 탭 패키지의 입출력단자와 반도체 칩과의 거리를 최소화하였으므로 탭 패키지가 인쇄회로기판이나 LCD 팬널에서 차지하는 면적 및 부피를 감소시켜 반도체 장치를 경박단소화할 수 있다.Therefore, since the distance between the input and output terminals of the tab package and the semiconductor chip is minimized, the semiconductor device can be reduced in size and weight by reducing the area and volume of the tab package in the printed circuit board or the LCD panel.

또한 탭 패키지를 LCD판넬에 실장하는 경우, 상기 LCD판넬상의 일측에 전원 입출력용의 배선을 별도로 구비하여 상기 탭 패키지를 COG 방법으로 LCD판넬상에 실정한 후, 상기 탭 패키지 및 전원 입출력선과 연결시킬 수 있다. 따라서 LCD등 반도체 장치의 주변장치를 경박단소화할 수 있다.When the tab package is mounted on the LCD panel, a wiring for power input / output is separately provided on one side of the LCD panel, and the tab package is mounted on the LCD panel by a COG method and then connected to the tab package and the power input / output wire. Can be. Therefore, peripheral devices of semiconductor devices such as LCDs can be reduced in size and weight.

Description

탭 패키지Tab package

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 이 발명에 따른 일 실시예를 나타내는 테이프 케리어의 평면도,4 is a plan view of a tape carrier showing an embodiment according to the present invention,

제5도는 이 발명에 따른 탭 패키지의 단면도,5 is a cross-sectional view of the tab package according to the invention,

제6도는 이 발명에 따른 탭 패키지의 실장 공정을 설명하기 위한 개략도.6 is a schematic view for explaining a mounting process of a tab package according to the present invention.

Claims (6)

베이스 필름의 양측에 일정 간격으로 스프로캣 구멍이 형성되어 있으며, 상기 베이스 필름상에 반도체 칩과 연결되는 내부 리이드 및 외부와 연결되는 외부 리이드로 구성되는 금속배선부가 형성되어 있고, 상기 내부 리이드들의 끝단이 노출되도록 상기 베이스 필름이 제거되어 디바이스 구멍이 형성되어 있는 테이프 케리어에 반도체 칩이 실장되는 탭 패키지에 있어서, 상기 외부 리이드와 디바이스 구멍 사이의 베이스 필름이 소정 부분 제거되어 상기 금속 배선부가 노출되도록 형성되어 있는 적어도 하나 이상의 절곡용 슬리트를 구비하여, 반도체 칩 실장시에 상기 절곡용 슬리트 부분이 절곡되며, 실장되는 반도체 칩의 측면에 노출된 금속 배선이 절연 접착되는 탭 패키지.Sprocket holes are formed on both sides of the base film at predetermined intervals, and metal wiring parts including an inner lead connected to the semiconductor chip and an outer lead connected to the outside are formed on the base film. In a tab package in which a semiconductor chip is mounted on a tape carrier in which a device hole is formed by removing the base film so that an end thereof is exposed, a portion of the base film between the outer lead and the device hole is removed to expose the metal wiring part. A tab package having at least one bending slitting formed therein, wherein the bending slitting portion is bent when the semiconductor chip is mounted, and the metal wiring exposed to the side surface of the semiconductor chip to be mounted is insulated and bonded. 제1항에 있어서, 상기 베이스 필름에 외부 리이드를 노출시키기 위한 슬로트가 추가로 형성되어 있고, 상기 절곡용 슬리트가 디바이스 구멍과 슬리트의 사이에 적어도 하나 이상 형성되어 있는 탭 패키지.The tab package according to claim 1, wherein a slot for exposing the external lead is further formed in the base film, and at least one bending slitting is formed between the device hole and the slit. 제1항에 있어서, 상기 금속 배선부가 S자 또는 J자 형상으로 절곡되는 탭 패키지.The tab package of claim 1, wherein the metal wiring part is bent in an S shape or a J shape. 제1항에 있어서, 상기 탭 패키지의 실장 공정시 상기 탭 패키지의 상부를 압착할 수 있는 요부가 하부표면에 형성되어 있는 본드장치를 구비하여, 상기 본드 장치가 상기 탭 패키지를 압착하여 배선의 전극상에 실장되는 탭 패키지.The wiring apparatus of claim 1, further comprising a bond device having a recess formed on a lower surface of the recess to press the upper portion of the tab package during the mounting process of the tab package. Tab package mounted on the top. 제4항에 있어서, 상기 탭 패키지 실장 공정시 180∼250℃정도의 온도에서 상기 본드장치가 외부 리이드와 배선 전극을 압착하여 실장되는 탭 패키지.The tab package of claim 4, wherein the bond device is mounted by pressing the external lead and the wiring electrode at a temperature of about 180 ° C. to 250 ° C. during the tap package mounting process. 제4항에 있어서, 상기 외부 리이드와 배선 전극의 사이에 도전성 에폭시 및 솔더로 이루어지는 군에서 임의로 선택되는 하나의 도전물질을 개재시켜 실장되는 탭 패키지.The tab package according to claim 4, wherein the tab package is mounted between the external lead and the wiring electrode with one conductive material arbitrarily selected from the group consisting of conductive epoxy and solder.
KR1019920014391A 1992-08-11 1992-08-11 Tap package KR950003906B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920014391A KR950003906B1 (en) 1992-08-11 1992-08-11 Tap package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920014391A KR950003906B1 (en) 1992-08-11 1992-08-11 Tap package

Publications (2)

Publication Number Publication Date
KR940004794A true KR940004794A (en) 1994-03-16
KR950003906B1 KR950003906B1 (en) 1995-04-20

Family

ID=19337789

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920014391A KR950003906B1 (en) 1992-08-11 1992-08-11 Tap package

Country Status (1)

Country Link
KR (1) KR950003906B1 (en)

Also Published As

Publication number Publication date
KR950003906B1 (en) 1995-04-20

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