KR940001401B1 - Oxidation protecting thin film - Google Patents

Oxidation protecting thin film Download PDF

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KR940001401B1
KR940001401B1 KR1019910005474A KR910005474A KR940001401B1 KR 940001401 B1 KR940001401 B1 KR 940001401B1 KR 1019910005474 A KR1019910005474 A KR 1019910005474A KR 910005474 A KR910005474 A KR 910005474A KR 940001401 B1 KR940001401 B1 KR 940001401B1
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layer
silicon nitride
silicon
film
polycrystalline silicon
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KR1019910005474A
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KR920020761A (en
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김호기
배용태
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삼성전자 주식회사
김광호
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Local Oxidation Of Silicon (AREA)

Abstract

forming a nitride silicon layer (13), a polycrystalline silicon layer (14), and a nitride silicon layer (15), sequentially on the area of a silicon layer (12) which is formed on the semiconductor substrate (11) and will not be oxidized selectively, and forming a side-wall nitride silicon layer (17) on the side wall of the above layers with the nitride silicon, polycrystalline silicon, and the nitride silicon.

Description

산화 방지막Antioxidant film

제1도는 종래의 산화 방지막을 보인 단면도.1 is a cross-sectional view showing a conventional antioxidant film.

제2도의 (a)-(d)는 본 발명의 산화 방지막의 제조공정을 보인 공정도.(A)-(d) of FIG. 2 is a process chart which shows the manufacturing process of the antioxidant film of this invention.

제3도는 본 발명의 산화 방지막을 사용하여 선택산화를 진행한 상태를 보인 단면도.3 is a cross-sectional view showing a state in which selective oxidation is performed using the antioxidant film of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 반도체 기판 12 : 실리콘 산화막11 semiconductor substrate 12 silicon oxide film

13,15 : 질화 실리콘층 14 : 다결정 실리콘층13,15 silicon nitride layer 14 polycrystalline silicon layer

17 : 질화 실리콘 측벽막17 silicon nitride sidewall film

본 발명은 반도체 장치의 아이솔레이션(isolation) 공정중에서 절연층의 선택 산화를 위하여 형성하는 산화 방지막에 관한 것이다.The present invention relates to an antioxidant film formed for selective oxidation of an insulating layer during an isolation process of a semiconductor device.

반도체 제조공정에 있어서, 활성화 영역(active region)을 형성하고, 각 소자와 소자를 전기적으로 격리시킬 경우에 반도체 기판의 필요한 소정 부위를 선택 산화시키는 선택산화 방법을 사용하고 있다. 이 선택 산화방법은 주로 산소를 통과시키지 않는 성질이 있는 질화 실리콘을 산화 방지재로 이용하고 있다.In the semiconductor manufacturing process, a selective oxidation method is used in which an active region is formed, and selective oxidation of a predetermined portion of a semiconductor substrate is required when the devices and the devices are electrically isolated from each other. This selective oxidation method mainly uses silicon nitride which has a property of not allowing oxygen to pass through as an antioxidant.

다결정 실리콘 위에 질화 실리콘을 증착한 구조를 산화 방지재로 이용하여 반도체 기판의 소정 부위를 선택적으로 산하시키는 것은, 1990년 IEEE에서 발간한 기술문헌인“THE VLSI WORKSHOP ON NEW PROCESS TECHNOLOGY FOR VLSI”의 p14-16에 상세히 기술되어 있다.Selectively distributing a predetermined portion of a semiconductor substrate using a structure in which silicon nitride is deposited on polycrystalline silicon as an antioxidant, is described in p14 of “THE VLSI WORKSHOP ON NEW PROCESS TECHNOLOGY FOR VLSI”, a technical document published by IEEE in 1990. It is described in detail in -16.

이 종래의 기술은 제1도에 도시된 바와 같이, 반도체 기판(1)에 실리콘 산화층(2)를 형성하고, 산화시키지 않을 실리콘 산화층(2)의 상부에 다결정 실리콘층(3This conventional technique forms the silicon oxide layer 2 on the semiconductor substrate 1, as shown in FIG. 1, and the polycrystalline silicon layer 3 on top of the silicon oxide layer 2 that will not be oxidized.

)을 형성한 후, 다결정 실리콘층(3)의 상부에 질화실리콘층(4)을 증착하며, 다결정 실리콘층(3) 및 질화 실리콘층(4)의 측면에 질화 실리콘 측벽막(5)을 형성하여 실리콘 산화층(2)을 선택산화하고 있다.), And then the silicon nitride layer 4 is deposited on the polycrystalline silicon layer 3, and the silicon nitride sidewall film 5 is formed on the sides of the polycrystalline silicon layer 3 and the silicon nitride layer 4, respectively. The silicon oxide layer 2 is selectively oxidized.

그러나, 상기와 같은 종래의 기술은, 실리콘 산화층(2)의 선택산화에 따라 질화 실리콘 측벽막(5)이 들려 올라가는 들림현상이 발생하고, 이로 인하여 다결정 실리콘층(3)이 산화되는 침식현상이 발생되었다.However, in the conventional technique as described above, the phenomenon in which the silicon nitride sidewall film 5 is lifted due to the selective oxidation of the silicon oxide layer 2 is generated, which causes the erosion phenomenon in which the polycrystalline silicon layer 3 is oxidized. Occurred.

이러한 다결정 실리콘층(3)의 산화로 인하여 실리콘 산화층(2)을 산화시키지 않은 반도체 기판(1)상에 소정의 소자를 제조하기 위하여 다결정 실리콘층(3), 질화 실리콘층(4) 및 질화 실리콘 측벽막(5)을 제거할 경우에는 상기와 같은 다결정 실리콘층(3)의 산화로 인하여 에칭시간이 길어지고, 반도체 기판(1)도 많이 식각되는 문제점이 있었다. 또한, 반도체 기판(1)에 미세한 크기의 활성화 영역을 형성하기도 어렵고, 실리콘 산화층(2)을 두껍게 산화시킬 경우에는 상기와 같은 현상이 더욱 두드러지게 나타나는 문제점이 있었다.The polycrystalline silicon layer 3, the silicon nitride layer 4, and the silicon nitride are fabricated on the semiconductor substrate 1 in which the silicon oxide layer 2 is not oxidized due to the oxidation of the polycrystalline silicon layer 3. When the sidewall film 5 is removed, the etching time is long due to the oxidation of the polycrystalline silicon layer 3 as described above, and the semiconductor substrate 1 is also etched a lot. In addition, it is difficult to form an activation region of minute size in the semiconductor substrate 1, and when the silicon oxide layer 2 is thickly oxidized, there is a problem in that the above phenomenon is more prominent.

그러므로 본 발명의 목적은, 선택산화시 질화 실리콘 측벽막의 들림 현상을 방지하여 다결정 실리콘층이 산화되는 침식현상이 발생되지 않도록 하는 산화 방지막을 제공하는 데 있다.It is therefore an object of the present invention to provide an anti-oxidation film which prevents the phenomenon of erosion of oxidizing the polycrystalline silicon layer by preventing the phenomenon of lifting the silicon nitride sidewall film during selective oxidation.

이와같은 목적을 가지는 본 발명의 산화 방지막은 반도체 기판의 실리콘 산화층을 선택산화시키지 않을 부위에 먼저 질화 실리콘층을 형성하여 실리콘 산화층을 선택산화시키게 된다. 그러므로 본 발명에 의하면, 실리콘 산화층의 선택산화시 질화 실리콘이 다결정 실리콘층을 완전히 감싸주게 되므로 다결정 실리콘층이 산화되는 것이 방지되고, 질화 실리콘 측벽막을 잡아주어 들림현상을 방지한다.The anti-oxidation film of the present invention having such a purpose is to first oxidize the silicon oxide layer by first forming a silicon nitride layer on a portion where the silicon oxide layer of the semiconductor substrate is not selectively oxidized. Therefore, according to the present invention, since the silicon nitride completely covers the polycrystalline silicon layer during the selective oxidation of the silicon oxide layer, the polycrystalline silicon layer is prevented from being oxidized and the silicon nitride sidewall film is held to prevent the lifting phenomenon.

이하, 첨부된 제2도 내지 제4도의 도면을 참조하여 본 발명의 산화 방지막을 상세히 설명한다.Hereinafter, the antioxidant film of the present invention will be described in detail with reference to the accompanying drawings of FIGS. 2 to 4.

제2도는 본 발명의 산화 방지막의 제조과정을 보인 공정도이다.2 is a process chart showing the manufacturing process of the antioxidant film of the present invention.

이와 같은 본 발명은, 제2도의 (a)에 도시된 바와 같이 반도체 기판(11)상에 실리콘 산화층(12)을 형성하고, 실리콘 산화층(12)의 상부에 질화 실리콘층(13), 다결정 실리콘층(14) 및 질화 실리콘층(15)을 순차적으로 형성한다. 그리고, 제2도의 (b)에 도시된 바와 같이 사진공정으로 포토레지스터(16)의 패턴을 형성한 후 제2도의 (c)에 도시된 바와 같이 식각공정으로 선택산화할 실리콘 산화층(12)이 노출되면, 질화 실리콘층(13), 다결정 실리콘층(14) 및 질화 실리콘층(15)의 측벽에 제2도의 (d)에 도시된 바와 같이 질화 실리콘을 증착한 후 에치 백 공정으로 질화 실리콘 측벽막(17)을 형성하여 산화 방지막을 제조한다.As described above, in the present invention, the silicon oxide layer 12 is formed on the semiconductor substrate 11, and the silicon nitride layer 13 and the polycrystalline silicon are formed on the silicon oxide layer 12. The layer 14 and the silicon nitride layer 15 are formed sequentially. Then, as shown in (b) of FIG. 2, the pattern of the photoresist 16 is formed by a photo process, and then the silicon oxide layer 12 to be selectively oxidized by an etching process as shown in (c) of FIG. 2 is formed. When exposed, silicon nitride is deposited on the sidewalls of the silicon nitride layer 13, polycrystalline silicon layer 14, and silicon nitride layer 15 as shown in FIG. The film 17 is formed to produce an antioxidant film.

이와 같은 본 발명의 산화 방지막은 실리콘 산화층(12)을 선택산화시켜 제3도에 도시된 바와 같이 성장시킬 경우에 산화 방지막의 첫번째층인 질화 실리콘층(13)이 질화 실리콘 측벽막(17)을 잡아주게 되므로 질화 실리콘 측벽막(17In the antioxidant film of the present invention, when the silicon oxide layer 12 is selectively oxidized and grown as shown in FIG. 3, the silicon nitride layer 13, which is the first layer of the antioxidant film, forms the silicon nitride sidewall film 17. Silicon nitride sidewall film (17)

)의 들려 올라가는 들림현상이 발생되지 않고, 이로 인하여 침식현상의 발생이 방지되어 미세한 크기의 활성화 영역을 형성할 수 있을 뿐만 아니라 선택 산화막의 두께를 형성할 수도 있다.Raising of the cavities does not occur, thereby preventing the occurrence of erosion, thereby forming an activation region having a fine size and forming a thickness of the selected oxide film.

그리고, 질화 실리콘층(13) (15) 및 질화 실리콘 측벽막(17)이 다결정 실리콘층(14)을 완전히 감싸주게 되므로 다결정실리콘층(14)의 산화가 방지된다. 그러므로 질화 실리콘층(13) (15), 다결정 실리콘층(14) 및 질화실리콘 측벽막(17)을 제거할 경우에 에칭시간이 짧아지게 되고, 실리콘 산화층(12)을 선택산화시키지 않은 반도체 기판(11)의 부위가 식각되는 것을 방지할 수 있다.Since the silicon nitride layers 13 and 15 and the silicon nitride sidewall film 17 completely surround the polycrystalline silicon layer 14, oxidation of the polycrystalline silicon layer 14 is prevented. Therefore, when the silicon nitride layers 13 and 15, the polycrystalline silicon layer 14 and the silicon nitride sidewall film 17 are removed, the etching time is shortened and the semiconductor substrate which does not selectively oxidize the silicon oxide layer 12 ( The part of 11) can be prevented from being etched.

Claims (1)

반도체 기판(11)에 형성한 실리콘 산화층(12)의 선택산화시키지 않을 부위에 질화 실리콘층(13), 다결정 실리콘층(14) 및 질화 실리콘층(15)을 순차적으로 형성하고, 이 질화 실리콘층(13), 다결정 실리콘층(14) 및 질화 실리콘층(15)의 측벽에 질화 실리콘 측벽막(17)을 형성한 것을 특징으로 하는 산화 방지막.The silicon nitride layer 13, the polycrystalline silicon layer 14, and the silicon nitride layer 15 are sequentially formed on a portion where the silicon oxide layer 12 formed on the semiconductor substrate 11 is not oxidized. (13) An anti-oxidation film characterized by forming a silicon nitride sidewall film (17) on the sidewalls of the polycrystalline silicon layer (14) and the silicon nitride layer (15).
KR1019910005474A 1991-04-04 1991-04-04 Oxidation protecting thin film KR940001401B1 (en)

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