KR100261966B1 - Method of manufacturing field oxidation film - Google Patents

Method of manufacturing field oxidation film Download PDF

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Publication number
KR100261966B1
KR100261966B1 KR1019920027053A KR920027053A KR100261966B1 KR 100261966 B1 KR100261966 B1 KR 100261966B1 KR 1019920027053 A KR1019920027053 A KR 1019920027053A KR 920027053 A KR920027053 A KR 920027053A KR 100261966 B1 KR100261966 B1 KR 100261966B1
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South Korea
Prior art keywords
nitride film
oxide film
film
nitride
field oxide
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KR1019920027053A
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Korean (ko)
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KR940016589A (en
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김남호
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김영환
현대전자산업주식회사
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Abstract

PURPOSE: A method of manufacturing a field oxidation film is provided to prevent the decrease of effective channel width by forming a nitride film spacer on sidewalls of a nitride film pattern to previously assure the effective channel width. CONSTITUTION: First, a pad oxidation film is formed on a silicon substrate(10). Then, a first nitride film pattern of a thermal oxidation mask for device isolation is formed on the pad oxidation film. Next, a second nitride film is formed on all surface of the resultant structure, and a second nitride film spacer(3) of a predetermined width is formed on sidewalls of the first nitride film pattern by etching the second nitride film. Then, the substrate(10) is exposed by removing the exposed pad oxidation film. Next, a field oxidation film(4) is formed by the thermal oxidation of the exposed silicon substrate(10). Finally, the first nitride film pattern and the second nitride film spacer are removed.

Description

필드산화막 제조방법Field oxide film manufacturing method

제1도 내지 제4도는 본 발명에 의해 필드산화막을 형성하는 단계를 도시한 단면도.1 to 4 are cross-sectional views showing the step of forming a field oxide film according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 패드산화막 2 : 제1 질화막1 pad oxide film 2 first nitride film

2A : 제1 질화막 패턴 3 : 제2 질화막 스페이서2A: first nitride film pattern 3: second nitride film spacer

4 : 필드산화막 10 : 실리콘기판4: field oxide film 10: silicon substrate

본 발명은 고집적 반도체소자의 필드산화막 제조방법에 관한 것으로, 특히 소자를 분리시키는 필드산화막의 버즈빅(bird`s beak)에 의해 유효채널 폭이 감소되는 것을 방지할 수 있는 필드산화막 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a field oxide film of a highly integrated semiconductor device, and more particularly, to a method for manufacturing a field oxide film which can prevent the effective channel width from being reduced by bird's beak of a field oxide film separating the device. will be.

반도체소자의 각 소자간의 분리를 실시할 때 필드산화막을 형성하는데 필드산화막의 버즈빅에 의한 유효채널폭(effective channel width)이 감소되어 채널이 협소하게 됨으로 인해 소자의 문턱전압이 증가된다.The field oxide film is formed when the semiconductor devices are separated from each other. An effective channel width due to the buzz of the field oxide film is reduced and the channel is narrowed, thereby increasing the threshold voltage of the device.

따라서, 소자의 특성이 저하되는데 서브마이크론급 이하의 소자로 갈수록 이 현상은 더욱 심각해진다.Therefore, the characteristics of the device are deteriorated. This phenomenon becomes more serious as the device becomes sub-micron-class or less.

또한, 종래기술에서 버즈빅의 생성을 억제하기 위해 질화막을 두껍게 하였을 경우 스트레스로 인한 결정결함이 발생하여 소자의 신뢰성이 저하된다.In addition, in the prior art, when the nitride film is thickened to suppress the production of buzz big, crystal defects are generated due to stress, thereby reducing the reliability of the device.

따라서, 본 발명은 상기한 문제점을 해결하기 위해 질화막 패턴 측벽에 질화막 스페이서를 형성하여 버즈빅이 생성되는 폭을 미리 확보함으로써 유효채널 폭이 줄어들지 않도록 하는 필드산화막 제조방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method of manufacturing a field oxide layer in which an effective channel width is not reduced by forming a nitride layer spacer on a nitride layer pattern sidewall in advance to solve the above problems, thereby securing a width in which a buzz is generated.

이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

도 1 내지 도 4는 본 발명에 의해 필드산화막을 형성하는 단계를 도시한 단면도이다.1 to 4 are cross-sectional views showing the step of forming a field oxide film according to the present invention.

도 1는 실리콘기판(10) 상부에 패드산화막(1)과 제1질화막(2)을 적층한 상태의 단면도이다.FIG. 1 is a cross-sectional view of a pad oxide film 1 and a first nitride film 2 stacked on a silicon substrate 10.

도 2는 LOCOS공정에 의해 예정된 부분의 제1질화막(2)을 식각하여 제1질화막 패턴(2A)을 형성한 단면도로서, 제1질화막(2)식각시 하부의 패드 산화막(1)의 일정두께가 식각된다.FIG. 2 is a cross-sectional view of the first nitride film pattern 2A formed by etching the first nitride film 2 of the portion scheduled by the LOCOS process, wherein a predetermined thickness of the pad oxide film 1 at the lower portion of the first nitride film 2 is etched. Is etched.

도 3는 전체적으로 제2질화막(도시안됨)을 예정된 두께로 증착한 후 이방성식각공정으로 패드산화막(1)이 노출되기까지 제2질화막을 식각하여 제1질화막 패턴(2A) 측벽에 제2질화막 스페이서(3)를 형성하고, 노출된 패드산화막(1)을 식각한 상태의 단면도이다.FIG. 3 illustrates that the second nitride film is etched until the pad nitride film 1 is exposed by an anisotropic etching process after depositing the second nitride film (not shown) as a predetermined thickness. The second nitride film spacer is disposed on the sidewalls of the first nitride film pattern 2A. (3) is sectional drawing of the state which etched the exposed pad oxide film (1).

도 4는 열산화공정으로 노출된 실리콘기판(10)에 필드산화막(4)을 형성한 단면도로서, 필드산화막(4)의 가장자리에 형성되는 버즈빅의 폭(B)이 제2질화막 스페이서(3)의 폭과 동일하게 되어 실제적인 유효채널 폭(W)은 보호가 됨을 도시한 것이다.FIG. 4 is a cross-sectional view of the field oxide film 4 formed on the silicon substrate 10 exposed by the thermal oxidation process, wherein the width B of the buzz bee formed at the edge of the field oxide film 4 is defined as the second nitride film spacer 3. It is shown that the effective effective channel width (W) is protected by the same as the width.

상기한 본 발명에 의하면, 필드산화막 형성시 발생되는 버즈빅의 폭을 고려한 스페이서 질화막을 형성함으로써 유효채널 폭의 감소를 방지할 수 있다.According to the present invention described above, it is possible to prevent the reduction of the effective channel width by forming a spacer nitride film in consideration of the width of the buzz big generated when the field oxide film is formed.

Claims (1)

LOCOS공정에 의해 필드산화막을 형성하는 공정에서 유효채널 폭이 줄어드는 것을 방지할 수 있는 필드산화막 제조방법에 있어서, 실리콘기판 상부에 패드산화막을 형성하는 공정과, 상기 패드산화막상에 소자분리용 열산화 마스크인 제1질화막 패턴을 형성하는 공정과, 상기 구조의 전표면에 제2질화막을 형성하고 상기 제2질화막을 전면 식각하여 상기 제1질화막 패턴의 측벽에 예정된 폭의 제2질화막 스페이서를 형성하되, 노출된 패드산화막을 제거하여 실리콘 기판을 노출시키는 공정과, 상기 제1질화막 패턴과 제2질화막 스페이서를 열산화마스크로 상기 노출되어있는 실리콘기판을 열산화시켜 필드산화막을 형성하는 공정과, 상기 제1질화막 패턴과 제2질화막 스페이서를 제거하는 공정을 구비하는 필드산화막 제조방법.In the field oxide film manufacturing method which can prevent the effective channel width from being reduced in the process of forming the field oxide film by the LOCOS process, the method of forming a pad oxide film on the silicon substrate and thermal oxidation for device isolation on the pad oxide film. Forming a first nitride film pattern as a mask, forming a second nitride film on the entire surface of the structure, and etching the entire surface of the second nitride film to form a second nitride film spacer having a predetermined width on the sidewall of the first nitride film pattern; Removing the exposed pad oxide film to expose the silicon substrate, thermally oxidizing the exposed silicon substrate with a thermal oxidation mask using the first nitride pattern and the second nitride film spacer to form a field oxide film; A method of manufacturing a field oxide film comprising the step of removing the first nitride film pattern and the second nitride film spacer.
KR1019920027053A 1992-12-31 1992-12-31 Method of manufacturing field oxidation film KR100261966B1 (en)

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KR100261966B1 true KR100261966B1 (en) 2000-07-15

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920001675A (en) * 1990-06-09 1992-01-30 금성일렉트론주식회사 LOCOS Manufacturing Method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920001675A (en) * 1990-06-09 1992-01-30 금성일렉트론주식회사 LOCOS Manufacturing Method

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