KR930018340A - PLL servo control circuit - Google Patents

PLL servo control circuit Download PDF

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Publication number
KR930018340A
KR930018340A KR1019920002762A KR920002762A KR930018340A KR 930018340 A KR930018340 A KR 930018340A KR 1019920002762 A KR1019920002762 A KR 1019920002762A KR 920002762 A KR920002762 A KR 920002762A KR 930018340 A KR930018340 A KR 930018340A
Authority
KR
South Korea
Prior art keywords
frequency
phase detector
servo control
error voltage
control circuit
Prior art date
Application number
KR1019920002762A
Other languages
Korean (ko)
Other versions
KR950007432B1 (en
Inventor
강석규
Original Assignee
강진구
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019920002762A priority Critical patent/KR950007432B1/en
Publication of KR930018340A publication Critical patent/KR930018340A/en
Application granted granted Critical
Publication of KR950007432B1 publication Critical patent/KR950007432B1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PLL서어보 제어에 있어서, 초기 구동 회로와 함께 초기 구동 콘트롤러를 필요로 하고 Full in time이 늦은 단점을 없애는 것으로 위상 검파기(10)에서 두 신호의 주파수와 위상차를 검출한 후 루프필터(20)를 통과시켜 원하는 에러전압만을 추출하고 상기 에러전압을 레벨에 따라 증폭률을 달라하는 증폭기에서 증폭시켜 회전계(40)에 인가시키며 상기 회전계(40)의 회전전압에 따라 전압제어 발진기(50)의 주파수를 변동시켜 위상검파기(10)에 인가시키도록 한 것으로써 초기 구동부를 삭제시킬 수 있는 한편 Full in time을 빠르게 할 수 있다.In the PLL servo control, an initial driving controller is required together with an initial driving circuit, and the loop filter 20 is detected after detecting the frequency and phase difference of the two signals in the phase detector 10 to eliminate the disadvantage that the full in time is late. Pass only the desired error voltage and amplify the error voltage in an amplifier of varying amplification rate according to the level and apply it to the tachometer 40, and change the frequency of the voltage controlled oscillator 50 in accordance with the rotation voltage of the tachometer 40. By applying the phase detector 10 to the phase detector 10, the initial driving unit can be deleted and the full in time can be increased.

Description

PLL서어보 제어회로PLL servo control circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 PLL서어보 제어회로도, 제3도는 본 발명 증폭기의 에러 전압에 따른 증폭률 변화를 나타낸 표.2 is a PLL servo control circuit diagram of the present invention, and FIG. 3 is a table showing amplification rate change according to an error voltage of the amplifier of the present invention.

Claims (1)

입력신호와 기준신호와의 주파수와 위상차를 검출하여 에러 전압을 발생시키는 위상 검파기(10)와, 상기 위상검파기(10)의 에러전압을 원하는 신호만 추출하는 루프필터(20)와, 상기 루프필터(20)에서 추출된 에러전압 레벨에 따라 다른 증폭률을 갖는 증폭기(30)와, 상기 증폭기(30)에서 증폭되어 회전계(40)를 통과한 에러 전압을 받아 주파수로 변환시키는 전압제어 발진기(50)를 구성시킨 PLL서어보 제어회로.A phase detector 10 for generating an error voltage by detecting a frequency and a phase difference between an input signal and a reference signal, a loop filter 20 for extracting only an error signal of the phase detector 10, and the loop filter; An amplifier 30 having an amplification factor different according to the error voltage level extracted at 20 and a voltage controlled oscillator 50 amplified by the amplifier 30 and receiving an error voltage passed through the rotation system 40 and converting the frequency into a frequency. PLL servo control circuit configured. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920002762A 1992-02-21 1992-02-21 Circuit for controlling pll servo KR950007432B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920002762A KR950007432B1 (en) 1992-02-21 1992-02-21 Circuit for controlling pll servo

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920002762A KR950007432B1 (en) 1992-02-21 1992-02-21 Circuit for controlling pll servo

Publications (2)

Publication Number Publication Date
KR930018340A true KR930018340A (en) 1993-09-21
KR950007432B1 KR950007432B1 (en) 1995-07-10

Family

ID=19329385

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920002762A KR950007432B1 (en) 1992-02-21 1992-02-21 Circuit for controlling pll servo

Country Status (1)

Country Link
KR (1) KR950007432B1 (en)

Also Published As

Publication number Publication date
KR950007432B1 (en) 1995-07-10

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