KR930014028A - Address program selection circuit - Google Patents

Address program selection circuit Download PDF

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Publication number
KR930014028A
KR930014028A KR1019910024792A KR910024792A KR930014028A KR 930014028 A KR930014028 A KR 930014028A KR 1019910024792 A KR1019910024792 A KR 1019910024792A KR 910024792 A KR910024792 A KR 910024792A KR 930014028 A KR930014028 A KR 930014028A
Authority
KR
South Korea
Prior art keywords
selection circuit
program selection
address
address program
decoder
Prior art date
Application number
KR1019910024792A
Other languages
Korean (ko)
Inventor
이규동
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019910024792A priority Critical patent/KR930014028A/en
Publication of KR930014028A publication Critical patent/KR930014028A/en

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Abstract

본 발명은 어드레스와 그에 대응하는 디바이스를 선택하는 디바이스 기억 레지스터를 부가하여 레지스터값에 따라서 디코딩하도록 한 것이다.In the present invention, a device storage register for selecting an address and a corresponding device is added to decode according to a register value.

Description

어드레스 프로그램 선택회로.Address program selection circuit.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래의 어드레스 디바이스 회로,1 is a conventional address device circuit,

제2도는 본 발명의 블록도,2 is a block diagram of the present invention,

제3도는 본 발명의 실시예의 회로도.3 is a circuit diagram of an embodiment of the invention.

Claims (1)

어드레스 버스(10)와, 상기 어드레스 버스에서 지정한 데이터를 디코딩하는 어드레스 디코더(20)와, 상기 디코더에서 디코딩된 신호에 의해서 지정하는 선택 디바이스 레지스터(30)와, 상기 레지스터에 의해서 디바이스를 선택하는 디바이스 선택 디코더(40)를 포함하도록 한 것을 특징으로 하는 어드레스 프로그램 선택회로.An address bus 10, an address decoder 20 for decoding the data designated by the address bus, a selection device register 30 designated by a signal decoded by the decoder, and a device for selecting a device by the register An address program selection circuit, characterized in that it comprises a selection decoder (40). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910024792A 1991-12-28 1991-12-28 Address program selection circuit KR930014028A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910024792A KR930014028A (en) 1991-12-28 1991-12-28 Address program selection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910024792A KR930014028A (en) 1991-12-28 1991-12-28 Address program selection circuit

Publications (1)

Publication Number Publication Date
KR930014028A true KR930014028A (en) 1993-07-22

Family

ID=67345847

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910024792A KR930014028A (en) 1991-12-28 1991-12-28 Address program selection circuit

Country Status (1)

Country Link
KR (1) KR930014028A (en)

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