KR930011282A - Single Polycrystalline Silicon Bipolar Device Structure and Fabrication Method with Self-aligned Silicide Electrode - Google Patents

Single Polycrystalline Silicon Bipolar Device Structure and Fabrication Method with Self-aligned Silicide Electrode Download PDF

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KR930011282A
KR930011282A KR1019910021081A KR910021081A KR930011282A KR 930011282 A KR930011282 A KR 930011282A KR 1019910021081 A KR1019910021081 A KR 1019910021081A KR 910021081 A KR910021081 A KR 910021081A KR 930011282 A KR930011282 A KR 930011282A
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polycrystalline silicon
oxide film
electrode
nitride film
base
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김귀동
구진근
한태현
구용서
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경상현
재단법인 한국전자통신연구소
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step

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  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

본 발명은 정보의 고속처리를 요하는 시스템에 사용되는 바이폴라 소자구조 및 제조방법에 관한 것으로서, 종래의 바이폴라 소자의 구조는 다결정 실리콘 전극들간의 트렌치 격리영역을 정의하기 위한 측벽 질화막을 에미터다결정 실리콘 전극의 안쪽에 정의함으로써 공정 신뢰도 측면에서 두가지의 문제점을 가지고 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar device structure and a manufacturing method used in a system requiring high-speed processing of information. The structure of a conventional bipolar device includes an emitter polycrystalline silicon having a sidewall nitride film for defining trench isolation regions between polycrystalline silicon electrodes. Defining the inside of the electrode has two problems in terms of process reliability.

첫째로 P+다결정 실리콘의 선택적 건식식각을 위한 다결정 실리콘 산화막 성장시 다결정 실리콘 내에서의 붕소 역산화에 의한 베이스-컬렉터 접합 깊이의 불균일성 활성 및 비활성 베이스 영역을 형성하기 위한 붕소의 동시 주입 등을 베이스 접합깊이와 불순물 분포의 제어를 곤란하게 한다.Firstly, the base bonding is performed by the simultaneous implantation of boron to form the non-uniform activity of the base-collector junction depth by boron back oxidation in the polycrystalline silicon and the formation of the inactive base region during the growth of the polycrystalline silicon oxide layer for the selective dry etching of P + polycrystalline silicon. Control of depth and impurity distribution becomes difficult.

둘째로 소자의 전체 크기를 결정하는 P+다결정 실리콘의 선행 정의는 각 전극간의 전기적 격리를 위한 다결정실리콘의 건식식각시 식각종점의 결정을 곤란하게 한다.Secondly, the prior definition of P + polycrystalline silicon, which determines the overall size of the device, makes it difficult to determine the etching end point during dry etching of polycrystalline silicon for electrical isolation between electrodes.

또한 증착 산화막에 의한 트렌치 격리영역의 목구공정은 다결정 실리콘 에미터 표면의 손상을 가져올 수 있다. 본 발명은 각 다결정 실리콘 전극간의 트렌치 격리영역을 정의하기 위한 측멱 질화막을 에미터 다결정 실리콘전극의 바깥쪽으로 형성함으로써, 다결정 실리콘의 식각종짐의 결정을 용이하게 하고, 또한 에미터 다결정 실리콘 전극상에 질화막과 N+다결정 실리콘을 이용함으로써 트렌치 격리영역의 복구를 위한 증착산화막의 건식식각의 종점의 절정과 베이스 영역에서의 불순물 분포의 제어를 용이하게 하고, 또한 다결정 실리콘 전극상에 실리사이드가 선택적으로 자기 정렬되는 구조척 개선을 통하여 공정 신뢰도와 바이폴라 소자의 성능을 향상시키도록한 것이다.In addition, the necking process of the trench isolation region by the deposition oxide may damage the surface of the polycrystalline silicon emitter. The present invention forms a side nitride film for defining the trench isolation region between each polycrystalline silicon electrode on the outside of the emitter polycrystalline silicon electrode, thereby facilitating the determination of etch termination of the polycrystalline silicon, and on the emitter polycrystalline silicon electrode. The use of a nitride film and N + polycrystalline silicon facilitates the climax of the dry etching end point of the deposited oxide film for the recovery of the trench isolation region and the control of the impurity distribution in the base region, and the selective suicide of the silicide on the polycrystalline silicon electrode. Through improving the structural scale, the process reliability and the performance of the bipolar device are improved.

Description

자기정렬된 실리사이드 전극을 갖는 단일 다결정 실리콘 바이폴라 소자 구조 및 제조방법Single Polycrystalline Silicon Bipolar Device Structure and Fabrication Method with Self-aligned Silicide Electrode

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의하여 완성된 단일 다결정 실리콘 바이폴라 소자의 단면도.2 is a cross-sectional view of a single polycrystalline silicon bipolar device completed in accordance with the present invention.

제3도의 (a) 내지 (f)는 본 발명에 의한 단일 다결정 실리콘 바이폴라 소자의 제조 공정도.(A)-(f) of FIG. 3 is a manufacturing process chart of the single polycrystal silicon bipolar element by this invention.

Claims (5)

다결정 실리콘전극(25),(26),(27)간의 트렌치 격리 영역을 정의하기 위한 측벽 질화막(5)을 에미터 다결정실리콘 전극(26) 상에 질화막(22)과 N+단결정 실리콘(4)을 형성하여 트렌치 격리영역(12)의 복구를 위한 증착산화막의 건식식각의 종점의 결정과 그리고 베이스 영역(17)에 불순물 분포의 제어를 용이하게 하고 또한 다결정실리콘 에미터, 베이스, 컬렉터 전극(25),(26),(27)상에 실리사이드(18)가 선택적으로 자기정렬되는 구조적 개선을 통하여 소자의 기생저항 성분을 초소화 시키도록 함을 특징으로 하는 자기정렬된 실리사이드 전극을 갖는 단일 다결정 실리콘 바이폴라 소자.The sidewall nitride film 5 for defining the trench isolation region between the polycrystalline silicon electrodes 25, 26, and 27 is placed on the emitter polycrystalline silicon electrode 26 with the nitride film 22 and the N + single crystal silicon 4; To facilitate the determination of the end point of dry etching of the deposited oxide film for the recovery of the trench isolation region 12 and the control of the impurity distribution in the base region 17 and also the polysilicon emitter, base, collector electrode 25 A single polycrystalline silicon bipolar with self-aligned silicide electrode characterized by minimizing the parasitic resistance component of the device through structural improvements in which the silicide 18 is selectively self-aligned on, (26), (27). device. 소자격리 산화막(23)의 보호를 위하여 산화막(23)상에 질화막(22)을 형성하고 질화막(22)위에는 에미터, 베이스, 컬렉터 전극을 형성하기 위하여 다결정 실리콘(1)을 증착하고, 다결정 실리콘(1)위에는 다결정 실리콘에미터 표면의 보호를 위하여 건식산소 분위기에서 완층 다결정 실리콘 산화막(2)을 성장하고 N+다결정 실리콘(4)의 습식식각의 종점을 제공하기 워하여 산화막(2)위에 질화막(3)을 증착하고 증착산화막의 건식식각시 질화막(3)의 보호와 식각의 종점을 위하여 질화막(3)위에 N+다결정 실리콘(4)을 증착하고 제1공정과, 다결정 실리콘을 선택적으로 건식식각 하기 위하여 다결정 실리콘(1),(4)상에 산화막(6)을 성장하여 사진 식각 방법에 의해 소자의 전체 크기를 정의하는 제2공정과, 각 전극간의 트렌치 격리영역(7)과 다결정 실리콘 전극(8),(9),(10)들을 동시에 형성하고, 다결정 실리콘 산화막(6)을 제거한 후 건식산소 분유기에서 산화막(11)성장과 붕소 이온을주입하여 비활성 및 활성 베이스 영역간의 P+연절충과 트렌치 절기 영역을 형성하는 제3공정과, 저온증착 산화막을 증착하여 N+단절정 실리콘(4)과 베이스 다결정 실리콘(8)의 표면이 노출될때 까지 건식 식각하여 트렌치격리 산화막(12)을 형성하고 N+다결정 실리콘(4)을 제거한 후 붕소의 도핑에 의하여 P++비활성 베이스 전극(25)을 형성하고, 에미터 다결정 실리콘(9) 내로 불순물의 선택적 이온 주입을 위하여 P++베이스 전극(25) 상에 산화막(13)을 성장하여 트렌치 격리산화막과 P++베이스 다결정 실리콘 전극을 형성하는 제4공정과, 질화막(3)을 제거한 후 붕소와 비소를 이온주입하여 질소 분위기에서 열처리 함으로써 소자의 확산층(14),(15),(16),(17)들을 최종적으로 형성하여 소자의 활성 영역을 형성하는 제5공정과, 다결정 실리콘 산화막(2),(13)들을 제거한후 전이금속을 증착하고 질소 분위기에서 열처리에 의하여 전이금속을 실리사이드화 한 후, 트렌치 격리산화막(12)상의 전이 금속을 지거하여 각 다결정 실리콘 전극(25),(26),(27)상에 실리사이드층과 금속배선을 형성하는 제6공정에 의하여 자기정렬된 실리사이드 전극을 갖는 단일 다결정 실리콘 바이폴라 소자 제조방법.In order to protect the device isolation oxide film 23, a nitride film 22 is formed on the oxide film 23, and polycrystalline silicon 1 is deposited on the nitride film 22 to form an emitter, a base, and a collector electrode. (1) grow a full polycrystalline silicon oxide film (2) in a dry oxygen atmosphere to protect the surface of the polycrystalline silicon emitter and provide an end point of wet etching of the N + polycrystalline silicon (4) to 3) depositing and depositing N + polycrystalline silicon (4) on the nitride film (3) for the protection and etching end point of the nitride film (3) during dry etching of the deposited oxide film, the first step and selectively dry etching the polycrystalline silicon The second step of defining the overall size of the device by the photolithography method by growing an oxide film 6 on the polycrystalline silicon (1), (4), the trench isolation region 7 between each electrode and the polycrystalline silicon electrode ( 8), (9), (10) A third step of simultaneously forming and removing the polycrystalline silicon oxide film 6 and implanting the oxide film 11 and boron ions in a dry oxygen powder to form a P + connection between the inactive and active base regions and a trench season region; Deposition of a low temperature deposition oxide film and dry etching until the surfaces of the N + single crystal silicon 4 and the base polycrystalline silicon 8 are exposed to form a trench isolation oxide film 12, and then remove the N + polycrystalline silicon 4, and then doping boron. Thereby forming a P ++ inert base electrode 25, and growing an oxide film 13 on the P ++ base electrode 25 for selective ion implantation of impurities into the emitter polycrystalline silicon 9, thereby forming a trench isolation oxide film and a P ++ base polycrystal. The fourth step of forming a silicon electrode, and after removing the nitride film 3, ion implantation of boron and arsenic, followed by heat treatment in a nitrogen atmosphere to diffuse the layers 14, 15, 16 and 17 of the device. Finally forming the active region of the device, and removing the polycrystalline silicon oxide films (2) and (13), depositing a transition metal, and silicifying the transition metal by heat treatment in a nitrogen atmosphere, followed by a trench. A single polycrystal having a silicide electrode self-aligned by a sixth step of forming a silicide layer and a metal wiring on each of the polycrystalline silicon electrodes 25, 26, and 27 by supporting the transition metal on the isolation oxide film 12 Silicon bipolar device manufacturing method. 제2항에 있어서, 측벽 질화막(5)을 에미터 전극의 바깥쪽에 형성함으로써 트렌치 격리산화막(12)에 의한 각 전극간의 전기적 절연을 제공하는 것을 특징으로 하는 자기정렬된 실리사이드 전극을 갖는 단일 다결정 실리콘바이폴라 소자 제조방법.3. The single polycrystalline silicon having self-aligned silicide electrodes according to claim 2, characterized in that the sidewall nitride film 5 is formed outside the emitter electrode to provide electrical insulation between the electrodes by the trench isolation oxide film 12. Bipolar device manufacturing method. 제2항에 있어서, 측벽 질화막(5)의 형성 베이스 다결정 실리콘의 열산화막(6) 성장과 소자의 크기를 정의하는 사진식각공정 후 피일드 산화막(23)과 질화막(22)이 노출될때까지 다결정 실리콘(1)을 이등방성 건식식각함으로써 공정이 신뢰도를 개선시키도록 한 것을 특징으로 하는 자기정렬된 살리사이드 전극을 갖는 단일 다결정실리콘 바이폴라 소자 제조방법.3. The polycrystalline silicon according to claim 2, wherein the formation of the sidewall nitride film 5 is performed until the exposed oxide film 23 and the nitride film 22 are exposed after the photolithography process defining the growth of the thermal oxide film 6 of the base polycrystalline silicon and the size of the device. A method for fabricating a single polysilicon bipolar device having a self-aligned salicide electrode, characterized in that the process is improved by anisotropic dry etching of silicon (1). 제2항에 있어서, 트렌치 격리 산화막(12)의 형성을 위한 증착산화막을 N+다결정 실리콘(4)의 표면이 노출될때까지 건식식각 함으로써 공정의 신뢰도를 향상시키도록 한 것을 특징으로 하는 자기정렬된 실리사이드 전극을 갖는 단일 다결정 실리콘 바이폴라 소자 제조방법.The self-aligned silicide according to claim 2, wherein the deposition oxide film for forming the trench isolation oxide film 12 is etched by dry etching until the surface of the N + polycrystalline silicon 4 is exposed. A method of manufacturing a single polycrystalline silicon bipolar device having an electrode. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910021081A 1991-11-25 1991-11-25 Manufacturing method of polysilicon bipolar device with self aligned silicide electrodes KR950001147B1 (en)

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