KR930006974B1 - Method for fabricating of stacked and trench capacitor - Google Patents
Method for fabricating of stacked and trench capacitor Download PDFInfo
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- KR930006974B1 KR930006974B1 KR1019900018368A KR900018368A KR930006974B1 KR 930006974 B1 KR930006974 B1 KR 930006974B1 KR 1019900018368 A KR1019900018368 A KR 1019900018368A KR 900018368 A KR900018368 A KR 900018368A KR 930006974 B1 KR930006974 B1 KR 930006974B1
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- oxide film
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- Semiconductor Memories (AREA)
Abstract
Description
제도는 종래의 스택 커패시터를 나타낸 단면도.Drafting is a cross-sectional view showing a conventional stack capacitor.
제2도는 (a)-(i)는 본 발명에 따른 트랜치를 이용한 스택 커패시터의 제조 공정도이다.2 is a manufacturing process diagram of a stack capacitor using a trench according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 실리콘기판 2 : 초기산화막1: silicon substrate 2: initial oxide film
3 : 질화막 4 : 포토레지스트3: nitride film 4: photoresist
5 : 필드산화막 6 : 트랜치5: field oxide film 6: trench
7 : 희생산화막 8 : 게이트7: sacrificial oxide film 8: gate
9 : 산화막 10 : 스토리지노드9: oxide film 10: storage node
11 : 커패시터 유전체막 12 : 플레이트11 capacitor dielectric film 12 plate
본 발명은 반도체 메모리 셀의 커패시터 제조방법에 관한 것으로, 특히 DR-AM(Dynamic Random Memory)의 커패시터 용량을 증가시킬 수 있도록 트랜치를 이용한 스택커패시터의 제조방법에 관한 것이다.The present invention relates to a method of manufacturing a capacitor of a semiconductor memory cell, and more particularly, to a method of manufacturing a stack capacitor using a trench to increase the capacitor capacity of a dynamic random memory (DR-AM).
현재 반도체 장치의 고집적화 추세에 따라 단위 면적에 탑재되는 소자의 수가 증가되어 커패시터 면적으로 사용되는 부분이 줄어들게 되었다. 이에 따라 원하는 용량의 커패시터를 확보하려는 연구가 활발히 진행되고 있으며, 제1도에 도시한 스팩 커패시터가 그 중의 하나이다.As the current trend of higher integration of semiconductor devices, the number of devices mounted in a unit area increases, which reduces the area used for capacitor area. Accordingly, researches to secure a capacitor having a desired capacity have been actively conducted, and the specification capacitor shown in FIG. 1 is one of them.
도면에서, (5)는 필드산화막, (8)은 게이트, (9)는 산화막, (10)은 스토리지노드, (11)은 커패시터 유전체막, (12)는 플레이트이다. 그러나, 제1도의 스택 커패시터는 16메가급 DRAM까지의 커패시터를 얻을 수 있으나, 16메가급 DRAM 이상의 초고집적 메모리소자에 적용하는 데는 한계가 있었다.In the figure, 5 is a field oxide film, 8 is a gate, 9 is an oxide film, 10 is a storage node, 11 is a capacitor dielectric film, and 12 is a plate. However, although the stack capacitor of FIG. 1 can obtain a capacitor up to 16 mega DRAM, there is a limit in applying it to an ultra-high density memory device of 16 mega DRAM or more.
본 발명은 이와 같은 문제점을 해결하기 위한 것으로, 본 발명의 목적은 커패시터 면적을 넓히기 위하여 트랜치를 이용한 스택커패시터의 제조방법을 제공하는 것이다.The present invention is to solve such a problem, an object of the present invention is to provide a method of manufacturing a stack capacitor using a trench to increase the capacitor area.
이와같은 목적을 달성하기 위한 본 발명의 특징은 실리콘기판상에 초기산화막, 질화막을 차례로 형성하는 공정과 필드영역과 필드영역에서 연장된 소자형성영역의 소정의 부분까지의 질화막, 초기산화막을 제거하여 실리콘기판을 노출시키는 공정과 포토레지스트를 마스크로 사용하여 필드영역내에 채널스톱을 위한 불순물을 주입하는 공정과 포토레지시트를 제거한 후 노출된 실리콘기판의 산화막, 초기산화막을 제거하는 공정과 소자형성영역의 성장된 필드산화막을 제거하는 공정과 통상의 공정에 의하여 스택커패시터를 형성하는 공정으로 이루어진 트랜치를 이용한 스택커패시터의 제조방법이다.In order to achieve the above object, the present invention provides a process of forming an initial oxide film and a nitride film on a silicon substrate, and removing the nitride film and the initial oxide film up to a predetermined portion of the field region and the element formation region extending from the field region. Process of exposing silicon substrate, process of injecting impurities for channel stop into field region using photoresist as mask, process of removing oxide film and initial oxide film of exposed silicon substrate after removing photoresist sheet and device formation region A method of manufacturing a stack capacitor using a trench consisting of a step of removing the grown field oxide film and forming a stack capacitor by a conventional process.
이하, 본 발명을 첨부도면에 의하여 상세히 설명한다. 제2도(a)-(i)는 본 발명에 따른 트랜치를 이용한 스택커패시터의 제조 공정도로서, 제1도와 동일 부호는 동일 재질을 나타낸다.Hereinafter, the present invention will be described in detail by the accompanying drawings. 2 (a)-(i) are manufacturing process diagrams of a stack capacitor using a trench according to the present invention, in which the same reference numerals as in FIG. 1 denote the same materials.
제2도(a)에 도시한 바와 같이 실리콘기판(1)상에 초기산화막(2), 질화막(3)을 차례로 형성한 후, 제2도(b)와 같이 필드영역과 필드영역을 연장한 소자형성내에서 콘택이 형성될 부분까지의 질화막(3), 초기산화막(2)을 식각하여 실리콘 기판(1)을 노출시킨다.As shown in FIG. 2A, an initial oxide film 2 and a nitride film 3 are sequentially formed on the silicon substrate 1, and then the field region and the field region are extended as shown in FIG. The silicon film 1 is exposed by etching the nitride film 3 and the initial oxide film 2 to the portion where the contact is to be formed in the device formation.
제2도(c)와 같이 소자형성영역내에 침입하지 않을 정도로 포토레지스트(4)를 마스크로 사용하여 필드영역의 채널스톱을 위한 이온주입을 실행한 후, 제2도(d)와 같이 포토레지스터(4)를 스트립(Strip)한 다음 제1도(a)에서 노출된 실리콘기판(1)의 산화막 성장에 의하여 필드산화막(5)을 형성한다. 이때, 필드산화막(5)은 소자형성영역내에서 콘택이 형성될 부분까지 성장된다.As shown in FIG. 2C, after the ion implantation for channel stop of the field region is performed using the photoresist 4 as a mask so as not to penetrate into the device formation region, as shown in FIG. After stripping (4), the field oxide film 5 is formed by the oxide film growth of the silicon substrate 1 exposed in FIG. At this time, the field oxide film 5 is grown to a portion where a contact is to be formed in the device formation region.
제2도(e)에 도시한 바와 같이 소장형성영역상의 질화막(3), 초기산화막(2)을 제거하여 실리콘기판(1)을 노출한 후, 제2도(f)와 같이 필드영역상의 필드산화막(5)만 남기고 소자형성영역내에까지 성장된 필드산화막(5)은 제거한다.As shown in Fig. 2 (e), the silicon substrate 1 is exposed by removing the nitride film 3 and the initial oxide film 2 on the small intestine forming region, and then the field on the field region as shown in Fig. 2 (f). The field oxide film 5 grown up to the element formation region while leaving only the oxide film 5 is removed.
이에따라, 소자형성영역내에 얕은 트랜치(6)가 형성된다. 제2도(g)와 같이 소자형성영역의 노출된 실리콘 표면의 식각에 의한 손상을 줄이기 위하여 희생산화막(7)을 형성한 후, 제2도(h)와 같이 희생산화막(7)을 제거한다.As a result, a shallow trench 6 is formed in the element formation region. A sacrificial oxide film 7 is formed to reduce damage due to etching of the exposed silicon surface of the device forming region as shown in FIG. 2G, and then the sacrificial oxide film 7 is removed as shown in FIG. .
이후, 제2도(i)에 도시한 바와 같이 통상의 공정에 따라서 스택커패시터를 형성하게 되어 트랜치(6)에 의한 만큼 커패시턴스가 증가되어진다. 이상 설명한 바와 같이, 본 발명에 따르면 콘택형성 부분까지 필드산화막을 형성하여 제거하는 것에 의하여 얕은 트랜치가 형성되므로 이 부분에 의한 면적만큼 커패시턴스의 향상을 모도할 수 있게 된다. 따라서, 16메가급 DRAM 이상의 초고집적 회로에 적용 가능하게 된다.Thereafter, as shown in FIG. 2 (i), the stack capacitor is formed in accordance with a conventional process, and the capacitance is increased by the trench 6. As described above, according to the present invention, since the shallow trench is formed by forming and removing the field oxide film to the contact forming portion, it is possible to improve the capacitance by the area by this portion. Accordingly, the present invention can be applied to an ultra-high integrated circuit of 16 mega DRAM or more.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019900018368A KR930006974B1 (en) | 1990-11-13 | 1990-11-13 | Method for fabricating of stacked and trench capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019900018368A KR930006974B1 (en) | 1990-11-13 | 1990-11-13 | Method for fabricating of stacked and trench capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920010917A KR920010917A (en) | 1992-06-27 |
| KR930006974B1 true KR930006974B1 (en) | 1993-07-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019900018368A KR930006974B1 (en) | 1990-11-13 | 1990-11-13 | Method for fabricating of stacked and trench capacitor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100245248B1 (en) * | 1996-12-28 | 2000-02-15 | 김영환 | Method of manufacturing semiconductor device |
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| KR920010917A (en) | 1992-06-27 |
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