KR930004339B1 - Time base correction apparatus for video recording and reproducing system - Google Patents

Abstract

A time base correction device of an image record reproduction system includes a signal processing means for brightness and color, a signal separating means for brightness and color, and a synchronous signal separating means. The synchronous signal separating means has an additional function that generates jitter noise onto the color signal. A standard signal generating means generates standard signal of friquency regulated record of time base correction and read address, according to the frequency change of a horizontal synchronous signal out of the synchronous signal separating means. This time base correction device also includes first and second time base correction means, a mixer and a phase controlling means.

Description

Time base compensation device

1 is a block diagram of a conventional time base correction apparatus.

2 is a block diagram of the time base correction apparatus of the embodiment according to the present invention.

* Explanation of symbols for main parts of the drawings

100: luminance and chroma signal processing means 200: luminance and color signal separation means

300: synchronous separation means 400: first time base correction means

500: second time base correction means 600: reference signal generating means

700: phase control means 800: second mixer

401: first A / D converter 402: first memory

403: 1D / A converter 501: color signal demodulator

502: second A / D converter 503: second memory

504: color signal encoder 505: 2D / A converter

601: Write controller 602: Divider

603 read controller

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for time base correction (hereinafter referred to as time base correction or TBC) of a video signal in a video recording and reproducing system. It relates to a time axis correction device for.

In general, in order to transmit an image signal accurately to a display device or an image recording system, the image signal is arranged and transmitted based on the synchronization signal.

However, in the recording and reproducing process, the rotation of the head, the fluctuation of the running speed of the tape, and the influence of other noises cause disturbances in the arrangement of the pulses. The picture displayed on the screen becomes distorted, making viewing difficult. In particular, when the video signal is processed in a digital form, the sampling frequency for each sync should be constant when converting the video signal into a digital video signal. However, the sampling frequency may vary as the cycle of the sync signal changes due to disturbances in the pulse array. do. As a result, jitter noise is generated in which a video signal designated for each pixel is shifted in units of several pixels from side to side, so that viewing of a screen displayed on a display device becomes difficult to see.

The time axis correction device corrects a screen displayed in a distorted state due to a disturbance occurring in the position of the synchronization signal in the video signal as described above, and in particular, a video recording / playback system for performing high-quality and accurate information processing Applied to the system.

A conventional time axis correcting apparatus used in an image recording and reproducing system will be described in detail with reference to FIG.

First turn relates to a video reproducing system, the composite video signal _(V S) that flows through the input stage is a pick-up information using the recording head on the recording medium.

This composite video signal (S _V) is applied to each of the time axis correcting unit 10 and the sync separation means (30). The composite video signal applied to the time axis correction means 10 is converted into a digital video signal by the A / D converter 11 and output to the time axis correction memory 12. The memory 12 has a storage capacity of at least 5H (horizontal period period)-10H, in order to prevent a memory jump from occurring.

The synchronizing separation means 30 separates the horizontal synchronizing signal f _H and the vertical synchronizing signal f _V from the applied complex image signal S _V and applies them to the recording control means 20. The horizontal synchronizing signal f _H is supplied as a reference signal of the PLL circuit 22, and the vertical synchronizing signal f _V is supplied to the write address counter 21 to reset for each field. The PLL circuit 22 outputs the write clock signal W _CLK in synchronization with the horizontal synchronization signal f _V to the write address counter 21. The recording address counter 21 is a vertical synchronization signal (f _V), a reset even while the PLL circuit 22 is recorded is applied from the clock signal (W _CLK), a time base correction means count is described by the 10 field by field by Applied to the memory 12, the write addresses are designated sequentially.

On the other hand, the read control means 40 applies a constant read clock signal R _CLK from the oscillator 42 to the read address counter 41, and the read address counter 41 applies the read clock signal. The output signal counted by (R _CLK ) is applied to the memory 12. The memory 12 outputs information of reading addresses sequentially designated by the count value output from the above-described reading address counter 41. The read information output is converted into an analog form of the digital image signal through the D / A converter 13, and the composite image signal is sent through the output terminal. The output terminal is connected to an externally installed display device or other video recording system.

= 기록번지와 판독번지간 허용 위상차; A_N은 상수)와 다시 감산된다. 이때 시간축변동이 일어나지 않은 경우에는 기준값(

)과 위상차(ADa)는 동일하므로 제2감산기(52)에서 출력되는 감산값(A_N)은 0이 된다. 반면에 시간축변동이 일어났을 경우에는 일어난 만큼의 위상차가 제2감산기(52)에서 출력된다. 제2 감산기(52)에서 출력된 제2 위상차(A_N)는 D/A변환기(53)에서 아날로그 형태로 변환되고, 저역필터(54)에서 저역필터링되어 이상기(60)로 출력된다. 이상기(60)는 발진기(42)에서 인가되는 수직동기신호를 저역필터(54)에서 출력된 위상차만큼 위상을 변화시킨 기준클럭신호(S_S)를 서보계로 출력한다. 따라서 기준클럭신호(S_S)에 의해 헤드의 회전이나 테이프의 주행속도의 변동에 의한 시간축 변동을 보정한 복합영상신호(S_V)가 재생되도록 한다.The phase difference detecting means 50 detects the phase difference between the write and read addresses in order to correct the time axis fluctuation with respect to the servo system. That is, the count value output from the write address counter 21 and the read address counter 41 is applied to the memory 12 and simultaneously applied to the first subtractor 51 so that the phase difference between the write address and the read address ADa; Is a constant), and the detected phase difference ADa is applied to the second subtractor 52, and the reference signal (predetermined to the second subtractor 52) is detected.

= Allowable phase difference between write address and read address; A _N is subtracted again). At this time, if no time axis change occurs,

) And the phase difference ADa are the same, so the subtracted value A _N output from the second subtractor 52 becomes zero. On the other hand, when a change in the time axis occurs, the phase difference as much as it occurs is output from the second subtractor 52. The second phase difference A _N output from the second subtractor 52 is converted into an analog form by the D / A converter 53, low-pass filtered by the low pass filter 54, and output to the idealizer 60. Phase shifter 60 has an oscillator 42, a reference clock signal (S _S) having a vertical synchronization signal by changing the phase difference output from the low pass filter 54 which is applied on the outputs to Step servo. Therefore, the reference clock signal (S _S) composite video signal (S _V) which is subjected to the correction of the time base fluctuation due to rotation and fluctuation of the tape running speed in the head by such that reproduction.

However, since the counting operation between the write address counter and the read address counter does not have an organic relationship, it is difficult to accurately detect the phase of the servo system with the phase difference obtained by comparing the address counting values of the two counters. . That is, the recording address counter may not only randomly change the counting speed according to the change of the horizontal sync signal, but also delay the recording address counter because it does not reach the speed of the recording clock signal (W _CLK ) generated from the PLL circuit. Since the counting is performed, the range of the time axis to compensate for the mismatch between the write address count value and the address counting value of the read address count is too large to detect an accurate phase difference. In addition, it is difficult to process information on digital multifunction by using luminance signal and color signal without any distinction, and jitter exists only in luminance signal, so that interleaving between luminance signal and color signal is not established. There were these expensive problems.

Accordingly, an object of the present invention is to correct the time axis correction of an image recording and reproducing system so that the digital multifunction processing can be easily performed. In providing a device.

In order to achieve the above object, the present invention provides luminance and color signal processing means for separately demodulating the luminance signal and the color signal by using the luminance signal processor and the color signal processor and outputting the mixed image signal mixed in the first mixer. And luminance and color signal separation means for separating the reproduction signal applied by the luminance and color signal processing means into luminance and color signals, and synchronous separation means for separating horizontal and vertical synchronization signals from the output signals of the luminance and color signal separation means, respectively. A time axis correcting apparatus of an image recording and reproducing apparatus, comprising: sync signal separating means for adding jitter to a color signal by applying a frequency of a color carrier to a color signal processor of said luminance and color signal processing means, and separating said sync signal; Time axis correction in which the period is adjusted in response to the period change of the horizontal synchronous signal output from the means Reference signal generating means for generating a reference signal of a recording and reading address, first time axis correction means for time-axis correction of the luminance signal controlled by the reference signal generating means and output from the brightness and color signal separating means, and the reference A second time axis correction means for time axis correction of the color signal outputted from the brightness and color signal separation means controlled by the signal generator, and a mixture of the brightness and color signals output from the first time axis correction part and the second time axis correction part; A mixer for outputting as a video signal, and phase control means for outputting a phase control signal to a servo system by controlling a phase for each field by a read reference clock signal from a write start point and a read start point output from the reference signal generator; It is characterized by.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a TBC apparatus according to an embodiment of the present invention, which is a reproduction circuit. 2 shows the brightness of connecting an input terminal to a magnetic head for picking up information recorded on a recording medium, connecting an input terminal of the preamplifier 101 to the connected input terminal, and connecting an input terminal to the output terminal of the preamplifier 101, respectively. Luminance and color signal processing means (100) comprising a signal processor (102), a color signal processor (103), and a first mixer (104) connected to an output terminal of the color signal processor (103) of the luminance signal processor (102); A luminance and color signal separation means 200 having an input terminal connected to an output terminal of the luminance and color signal processing means 100, and an input terminal connected to one output terminal of the luminance and color signal separation means 200, and the output terminal is connected to the color signal processor 103. The first time axis correcting means 400 and the second time axis correcting means 500 are connected to an input terminal of the synchronous signal separating means 300 connected to an input end of the signal generating means 600 and an input end of the reference signal generating means 600. Recorder connected output terminal to input terminal 601, an input terminal connected to the input terminal of the reference signal generating means 600, and an input terminal connected to the output terminal of the divider 602, and the first time axis correction means 400 and the second terminal. A reference signal generating means 600 composed of a read controller 603 connected to an input end of the time axis correcting means 500, and input terminals connected to an output end of the reference signal generating means 600, and an output end connected to a servo system. A first A / D converter 401 connected to an input terminal of the phase control means 700 and an output terminal of the luminance and color signal separation means 200, and one output terminal of the recording controller 601 to the input terminal, and a first A / D converter. A first memory 402 which connects the output terminals and the input terminals of the D converter 401 and the write controller 601 and the read controller 603, and an input terminal to the output terminal of the first memory 402, and the read controller 603. A first time axis correction means (300) comprising a first D / A converter (303) connected to an input of an output terminal of A second A / D converter in which a color signal decoder 501 having an input connected to the output terminal of the means 200 and one input terminal connected to the output terminal of the color signal decoder 501 and an output terminal of the recording controller 601 connected to the other input terminal. 502, a second memory 503 having one input terminal connected to the output terminal of the second A / D converter 502, and the output terminals of the write controller 601 and the read controller 603 connected to the input terminals; Color signal encoder 504 having an input connected to the output of the memory 503, and a second D / A converter having one input connected to the output of the color signal encoder 504 and another input connected to the output of the readout controller 603. A second mixer 800 configured to connect the second time axis correcting means 500, the output terminals of the first and second time axis correcting means 400, 500 to an input terminal, and output a composite video signal, and a recording controller 601. Input terminal is connected to the output terminal of the readout controller 603, and the output terminal is connected to the servo system. It belongs to the phase control means 700.

The operation in FIG. 2 is applied to the luminance and color signal processing means 100 when the information recorded on the recording medium is picked up by the recording head. The luminance and color signal processing means 100 amplifies a composite image signal applied by a known technique to a predetermined level through the preamplifier 101, and separates the luminance signal and the color signal into a luminance signal processor 102 and a color signal processor ( 103) were mixed in a demodulation after the first mixer (104) through the outputs reproduced composite video signal (S _V).

The luminance and color signal separating means 200 and outputs the re-separated into a luminance signal and a color signal applied to the composite sacred signal (S _V).

f_H(수평주사주파수)의 주파수를 색신호처리기(103)로 인가한다.

f_H는 3.58Mlt의 색부반송파의 주파수와 동일한 것이다. 또한 기록제어기(601)와 분주기(602)로 수평 주사주파수를 인가한다.The synchronizing signal separating means 300 detects and outputs a horizontal synchronizing signal among the luminance signals outputted from the luminance and color signal separating means 200, and in particular, a frequency converted color signal from low to high frequency conversion to form an interpolation between the luminance and color signals. To cause jitter

a frequency of f _H (horizontal scanning frequency) is applied to the color signal processor (103).

f _H is equal to the frequency of the color subcarriers of 3.58 Mlt. In addition, the horizontal scan frequency is applied to the recording controller 601 and the divider 602.

The horizontal scan frequency applied to the recording controller 601 is applied to the PLL circuit to output the recording clock W _CLK of 910f _H which is locked to the horizontal synchronization to output the recording address counter and the first and second A / D converters. 401, 502 and the first and second memories 402, 503, and the write address counter receives the write clock signal W _CLK applied from the PLL circuit and the write start signal Wst locked to the horizontal synchronization signal. Is output as (402,503).

를 판독제어기(603)로 출력한다. 판독제어기(603)는 인가된

신호를 PLL회로에 입력하여 10~15H에 록킹된 910f_H의 판독클럭(R_CLK)을 제1, 2메모리(402,502) 및 위상 제어수단(700)으로 출력하고, 판독클럭(R_CLK)이 인가됨에 따라 판독번지카운터는 판독스타트신호(Rst)를 제1, 2 메모리(402,502)로 출력한다. 판독스타트신호(Rst)는 초기에는 기록스타트신호(Wst)의 0.5H 후에 시작하고 그 후로는 판독클록(R_CLK)을 910f_H카운트하여 신호를 발생시키도록 하는데 라이트클럭은 f_H에 빨리 추종하고 리드클럭은

에 추종하므로서 판독번지카운트와 기록번지카운트는 유기적인 관계를 이룬다.The divider 602 divides the applied horizontal scanning frequency by 10-15 minutes.

Is output to the read controller 603. The read controller 603 is applied

A signal is input to the PLL circuit to output the read clocks R _CLK of 910f _H locked at 10 to 15H to the first and second memories 402 and 502 and the phase control means 700, and the read clocks R _CLK are applied. As a result, the read address counter outputs the read start signal Rst to the first and second memories 402 and 502. A read start signal (Rst) is initially started after 0.5H of the recording start signal (Wst) and thereafter to count to generate a signal to a read clock (R _CLK) 910f _H clock light and quickly follow the f _H Lead clock

The tracking address count and the recording address count form an organic relationship by following.

The phase control means 700 uses the read start signal Rst, the write start signal Wst, and the read clock signal R _CLK outputted from the write controller 601 and the read controller 603 of the reference signal generating means 600. By outputting the reference clock signal S _S , which is a phase control signal for each field, to the servo system so that the read start signal Wst and the write start signal Rst have a 0.5H delay, that is, a 180 ° phase difference, The running speed of the tape is controlled.

On the other hand, the first time axis correction means 400 controls the recording clock signal W _CLK by the first A / D converter 401 by the luminance signal output from the luminance and color signal separation means 200 to sample and decode the signal at a predetermined period. Generates a video signal. The first memory 402 temporarily stores the information of the digital video signal converted by the first A / D converter 401 in units of one horizontal period, and writes a write start signal Wst, a write clock signal W _CLK , and a read start signal. (Rst) and read clock signal (R _CLK ) controlled by the recording start signal (Wst) and sequentially record the composite video signal by the recording clock signal (W _CLK ), and the recording start signal (Wst) is applied. After that, it starts to be read by the read start signal Rst generated after 0.5H and outputs the information to the first D / A converter 403 by the read clock signal R _CLK . The first D / A converter 403 converts the output signal of the first memory 402, which is controlled and controlled by the read clock signal R _CLK , into an analog image signal, and sends the analog signal to the second mixer 800.

The second time axis correcting means 500 is a time axis correcting means for the color signal, and decodes the color signal output from the luminance and color signal separating means 200 by the decoder 501, and records the record clock signal by the second A / D converter 502. It is controlled by (W _CLK ), sampled, encoded, and generates a digital video signal. The second memory 503 temporarily stores the information of the digital video signal converted by the second A / D converter 501 in units of one horizontal cycle, and writes the write start signal Wst, the write clock signal W _CLK , and the read start signal. (Rst) and read clock signal (R _CLK ) are controlled by the recording start signal (Wst) and sequentially record the composite video signal by the reference clock signal (W _CLK ), and the recording start signal (Wst) is applied. The data starts to be read by the read start signal Rst generated after 0.5H and outputs the information sequentially read by the read clock signal R _CLK to the color signal encoder 504.

The color signal encoder 504 encodes an applied signal and outputs the encoded signal to the 2D / A converter 505. The second D / A converter 505 is controlled by the read clock signal R _CLK to convert the digital video signal into an analog video signal and output the analog video signal to the second mixer 800.

The mixer 800 mixes the luminance signal and the color signal output from the first time axis correcting means 400 and the second time axis correcting means 500 and transmits a composite video signal to the video output terminal.

As described above, the present invention has the advantage of correcting jitter in the vicinity of high frequency (1KHz ~ 1.5KHz) by generating a read clock signal of the read controller by a signal obtained by dividing the horizontal scan frequency f _H by N. In addition, there is an advantage that the time axis correction effect can be further improved by precisely controlling the phase of the servo system by having an organic relationship between the read address counting and the write address counting values. In addition, there is an advantage that the price of the system can be reduced by using the time base correction memory as the line memory.

Claims (7)

Luminance and color signal processing means for demodulating the luminance signal and the color signal separately through the luminance signal processor 102 and the color signal processor 103 and outputting the mixed image signal mixed in the first mixer 104 using the information picked up from the recording medium ( 100), the luminance and color signal separation means 200 for separating the reproduction signal applied from the luminance and color signal processing means 100 into the luminance and the color signal, and the horizontal and the output signal of the luminance and color signal separation means 200. In the time axis correction apparatus of the video recording and reproducing apparatus including the synchronous separation means (300) for separating the vertical synchronous signals, the frequency of the color carrier is applied to the color signal processor (103) of the luminance and color signal processing means (100). A time period in which the period is adjusted in response to the period change of the horizontal synchronization signal output from the synchronization signal separation means 300 and the synchronization signal separation means 300 having a function of causing jitter to be generated in the color signal. Correcting the time signal of the reference signal generating means 600 for generating a reference signal of the correction recording and reading address, and the luminance signal controlled by the reference signal generating means 600 and outputted from the brightness and color signal separating means 200. A first time axis correcting means (400), a second time axis correcting means (500) for controlling the time signal of the color signal controlled by the reference signal generator (600) and outputted from the luminance and color signal separating means (200); A mixer for mixing the luminance and color signals output from the first time axis correction means and the second time axis correction means and outputting them as a composite video signal; and a recording start point and a reading start point output from the reference signal generating means as read reference clock signals. And phase control means (700) for controlling the phase for each field to output the phase control signal to the servo system. The digital type of claim 1, wherein the first time axis correction means 400 is controlled by the recording start signal Wst output from the reference signal generating means 600, and is output from the luminance and color signal separation means 200. Starts recording the luminance signal, sequentially records the luminance signal by the recording clock signal W _CLK , and is controlled by the read start signal Rst to generate the recording start Wst, and the recorded luminance is 0.5H later. And a first memory (402) for starting the reading of the signal and sequentially reading said luminance signal by means of a read clock signal (R _CLK ). 3. The time axis correcting apparatus as claimed in claim 2, wherein said first memory (402) comprises a line memory for storing an amount of information of 1H. The recording clock signal W _CLK and the recording start signal Wst locked by the reference signal generating means 600 by the horizontal synchronizing signal f _H output from the synchronizing separation means 300. A recording controller 601 for outputting to the first time axis correction means 400, the second time axis correction means 500, and the phase control means 700, and a divider 602 for dividing the horizontal synchronization signal f _H by N; And a first time axis correcting means 400 and a second time axis correcting means locked to the read clock signal R _CLK and the read start signal Rst locked by the f _H / N signal output from the divider 602. 500, a time axis correction device, characterized in that consisting of a read controller (603) for outputting to the phase control means (700). The method of claim 1, wherein the second time axis correcting means 500 is controlled by the recording start signal Wst output from the reference signal generating means 600 to correct the time axis with respect to the color signal, thereby adjusting the luminance and color signal separating means 200. Start recording the color signal of the digital form outputted from < RTI ID = 0.0 >),< / RTI > the color signal sequentially by the recording clock signal W _CLK , and controlled by the read start signal Rst to generate a recording start Wst. And a second memory (502) for starting reading the written luminance signal after H and sequentially reading the color signal by a read clock signal (R _CLK ). 6. The time axis correcting apparatus according to claim 5, wherein said second memory (502) comprises a line memory for storing an amount of information of 1H. The method of claim 1, wherein the phase control means 700 includes a read clock signal (Wst) such that the write start signal Wst and the read start signal Rst output from the reference signal generator 600 have a phase difference of 1/2. R _CLK ) Time axis correction device characterized in that consisting of a function to control.

Images