KR930003783U - 입력버퍼회로 - Google Patents

입력버퍼회로

Info

Publication number
KR930003783U
KR930003783U KR2019910010942U KR910010942U KR930003783U KR 930003783 U KR930003783 U KR 930003783U KR 2019910010942 U KR2019910010942 U KR 2019910010942U KR 910010942 U KR910010942 U KR 910010942U KR 930003783 U KR930003783 U KR 930003783U
Authority
KR
South Korea
Prior art keywords
buffer circuit
input buffer
input
circuit
buffer
Prior art date
Application number
KR2019910010942U
Other languages
English (en)
Other versions
KR930007839Y1 (ko
Inventor
안희태
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR2019910010942U priority Critical patent/KR930007839Y1/ko
Publication of KR930003783U publication Critical patent/KR930003783U/ko
Application granted granted Critical
Publication of KR930007839Y1 publication Critical patent/KR930007839Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
KR2019910010942U 1991-07-15 1991-07-15 입력버퍼회로 KR930007839Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910010942U KR930007839Y1 (ko) 1991-07-15 1991-07-15 입력버퍼회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910010942U KR930007839Y1 (ko) 1991-07-15 1991-07-15 입력버퍼회로

Publications (2)

Publication Number Publication Date
KR930003783U true KR930003783U (ko) 1993-02-26
KR930007839Y1 KR930007839Y1 (ko) 1993-11-18

Family

ID=19316499

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910010942U KR930007839Y1 (ko) 1991-07-15 1991-07-15 입력버퍼회로

Country Status (1)

Country Link
KR (1) KR930007839Y1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102101929B1 (ko) * 2015-06-30 2020-04-17 (주)쿠첸 전기 레인지의 워킹 코일 베이스 조립체

Also Published As

Publication number Publication date
KR930007839Y1 (ko) 1993-11-18

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