KR940021417U - 출력 버퍼회로 - Google Patents

출력 버퍼회로

Info

Publication number
KR940021417U
KR940021417U KR2019930001283U KR930001283U KR940021417U KR 940021417 U KR940021417 U KR 940021417U KR 2019930001283 U KR2019930001283 U KR 2019930001283U KR 930001283 U KR930001283 U KR 930001283U KR 940021417 U KR940021417 U KR 940021417U
Authority
KR
South Korea
Prior art keywords
output buffer
buffer circuit
circuit
output
buffer
Prior art date
Application number
KR2019930001283U
Other languages
English (en)
Other versions
KR200148586Y1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to KR2019930001283U priority Critical patent/KR200148586Y1/ko
Publication of KR940021417U publication Critical patent/KR940021417U/ko
Application granted granted Critical
Publication of KR200148586Y1 publication Critical patent/KR200148586Y1/ko

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
KR2019930001283U 1993-02-02 1993-02-02 출력버퍼회로 KR200148586Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019930001283U KR200148586Y1 (ko) 1993-02-02 1993-02-02 출력버퍼회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019930001283U KR200148586Y1 (ko) 1993-02-02 1993-02-02 출력버퍼회로

Publications (2)

Publication Number Publication Date
KR940021417U true KR940021417U (ko) 1994-09-24
KR200148586Y1 KR200148586Y1 (ko) 1999-06-15

Family

ID=19350222

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019930001283U KR200148586Y1 (ko) 1993-02-02 1993-02-02 출력버퍼회로

Country Status (1)

Country Link
KR (1) KR200148586Y1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100401493B1 (ko) * 2000-12-27 2003-10-11 주식회사 하이닉스반도체 피크전류 감쇠회로

Also Published As

Publication number Publication date
KR200148586Y1 (ko) 1999-06-15

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Legal Events

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E902 Notification of reason for refusal
N231 Notification of change of applicant
E701 Decision to grant or registration of patent right
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FPAY Annual fee payment

Payment date: 20040218

Year of fee payment: 6

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