KR930000961Y1 - Real-time analog to interface circuit - Google Patents

Abstract

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Description

Real-time A / F Interface Circuit Using Comparator

1 is a circuit diagram according to the present invention.

2 is a timing diagram of FIG. 1 according to the present invention.

* Explanation of symbols for main parts of the drawings

10: detector 20: A / V converter

30: V / F converter 40, 41: 1st, 2nd counter

The present invention relates to an A / 'F interface circuit, and in particular, a real-time A / F (Analog) that can synchronize the output signal of a detector of a reference signal by using a comparator with the output of a sensor converted into a frequency component. / Frequency) interface circuit.

In general, a precision control device, a robot, an inertial navigation system detects various physical changes with a detector, converts the analog output of the detector into a digital signal, inputs it to a digital computer, and then Control is performed according to the sensed output, and more recently, it is possible to perform more precise control by using an analog / frequency converter.

However, the A / F converter currently in use not only causes the complexity of the circuit by using a very complicated modulation circuit and a demodulation circuit to synchronize the up / down reference signals and the output signal of the detector. There was a problem in terms of component mountability and maintenance.

Accordingly, an object of the present invention is to provide a real-time A / F interface circuit that can replace a conventional modulation and demodulation circuit using a comparator in view of these problems.

Another object of the present invention is to provide a real-time A / F interface circuit operating simple hardware by adopting a real-time A / F interface circuit using a comparator.

Another object of the present invention is to provide a real-time A / F interface circuit for easy maintenance and reliable.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a circuit diagram according to the present invention, a sensing unit 10 for sensing a physical change amount, and an A / V (Analog / Voltage) conversion unit for inputting the sensed output of the sensing unit 10 and converting it into a voltage level ( 20) and the output of the A / V converter 20 is input to one input terminal 25a and the other input terminal 25b is fixed to the ground level according to the difference between the input terminals 25a-25b. A comparator 25 for comparing and outputting, a V / F (Voltage / Freguerg) converter 30 for converting and outputting an oscillation frequency according to the voltage applied from the A / V converter 20, and the V / F The output of the converter 30 is input to the clock terminal CK and the first counter 40 which performs up counting when the output of the comparator 25 is high, and the output of the V / F converter 30 Inverting the output of the comparator 25 and the second counter 41 for inputting to the clock terminal (CK) and down counting when the output of the comparator 25 is low It is composed of an inverter 26 for output to the gate terminal (G) of the second counter 41.

FIG. 2 is a timing diagram of FIG. 1 according to the present invention, where 2a shows the output of the comparator 25 and 2b shows the output of the V / F converter 30.

Hereinafter, the present invention will be described in detail with reference to FIGS. 1 to 2 based on the above-described configuration. First, if the value sensed by the detector 10 is a physical quantity increased from the ground level, the A / V converter 20 increases the voltage because the physical quantity is increased and outputs the comparator ( The output of 25 is "high" and is input to the gate terminal G of the first counter 40, and at the same time, the output of the V / F converter 30 is the clock terminal of the first counter 40. It is entered as (CK).

At this time, when the output of the comparator 25 is kept high during the section T1 as shown in (2a) of FIG. 2, the output of the V / F converter 30 has a frequency of (2b) during the section T1. Accordingly, the first counter 40 performs up counting during the period T1.

On the other hand, if the value sensed by the sensing unit 10 is a physical quantity reduced from the ground level, the physical quantity is reduced in the A / V converter 20, and thus the voltage is reduced and output. The output is " low " and is inverted by the inverter 26 to be input to the gate terminal G of the second counter 41, and at the same time the output of the V / F converter 30 is Input is made to the clock terminal CK of the counter 4l.

At this time, when the output of the comparator 25 is kept inverted during the period T2 as shown in (2a) of FIG. 2 and the output is kept low, the output of the V / F converter 30 is reduced during the period T2 (2b). ) And the second counter 41 performs down counting during the period T2.

Here, the first-second counter 40-41 uses # 82C54 and sets an operation mode to count only when the gate terminal G is “high”.

Therefore, when the output of the sensing unit 10 increases in the positive direction, the first counter 40 performs up counting, and when the output of the sensing unit 10 decreases in the negative direction, The first counter 1 performs down counting, and the digital computer in the system continuously reads the value counted by the 1-2 counter 40-41 at regular time intervals and then performs an operation according to a program.

In this case, the digital computer controls the first-counter 40-41 through a control bus and then designates a address through an address bus, and inputs counting data to the data bus.

In the above description, the sensing unit 10 is assumed to be one, but a plurality of sensing units may be cascaded.

As described above, there is an advantage in real-time A / F interfacing circuit which can replace the conventional modulation and demodulation circuit using a comparator, and there is also an economic advantage in terms of component mountability and cost.

※ Note: The disclosure is based on the initial application.

Claims (1)

An A / F interface circuit having a digital computer, comprising: a sensing unit 10 for sensing a physical change amount, and an A / V converter for inputting the sensed output of the sensing unit 10 and converting the voltage into a voltage ( 20) and a comparator for inputting the output of the A / V converter 20 to one input terminal 25a and fixing the other input terminal 25b to the ground level for comparison and outputting the output according to the difference between the input terminals 25a-25b. And a V / F converter 30 for converting and outputting an oscillation frequency according to the voltage applied from the A / V converter 20, and clocking the output of the V / F converter 30. The first counter 40 which is inputted to the stage CK and performs up counting when the output of the comparator 25 is high, and the output of the V / F converter 30 are input to the clock stage CK. When the output of the comparator 25 is low, the second counter 41 performs down counting, and the output of the comparator 25 is inverted so that the crab of the second counter 41 is inverted. Teudan (G) real-time A / F interface circuit, characterized by consisting of a inverter 26 to output a.