KR920008269B1 - 배율기 회로 - Google Patents

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Publication number
KR920008269B1
KR920008269B1 KR1019900004467A KR900004467A KR920008269B1 KR 920008269 B1 KR920008269 B1 KR 920008269B1 KR 1019900004467 A KR1019900004467 A KR 1019900004467A KR 900004467 A KR900004467 A KR 900004467A KR 920008269 B1 KR920008269 B1 KR 920008269B1
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KR
South Korea
Prior art keywords
sample
input
output
bit
input terminal
Prior art date
Application number
KR1019900004467A
Other languages
English (en)
Korean (ko)
Other versions
KR900016888A (ko
Inventor
토마스 플링 러셀
Original Assignee
톰슨 컨슈머 일렉트로닉스 인코포레이티드
에릭 피. 허맨
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 톰슨 컨슈머 일렉트로닉스 인코포레이티드, 에릭 피. 허맨 filed Critical 톰슨 컨슈머 일렉트로닉스 인코포레이티드
Publication of KR900016888A publication Critical patent/KR900016888A/ko
Application granted granted Critical
Publication of KR920008269B1 publication Critical patent/KR920008269B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3852—Calculation with most significant digit first

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Databases & Information Systems (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)
  • Amplitude Modulation (AREA)
  • Analogue/Digital Conversion (AREA)
KR1019900004467A 1989-04-04 1990-04-02 배율기 회로 KR920008269B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US333052 1989-04-04
US333,052 1989-04-04
US07/333,052 US4970676A (en) 1989-04-04 1989-04-04 Digital word-serial multiplier circuitry

Publications (2)

Publication Number Publication Date
KR900016888A KR900016888A (ko) 1990-11-14
KR920008269B1 true KR920008269B1 (ko) 1992-09-26

Family

ID=23301055

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900004467A KR920008269B1 (ko) 1989-04-04 1990-04-02 배율기 회로

Country Status (7)

Country Link
US (1) US4970676A (fr)
JP (1) JPH02292632A (fr)
KR (1) KR920008269B1 (fr)
CA (1) CA2012808C (fr)
DE (1) DE4010735A1 (fr)
FR (1) FR2645294B1 (fr)
GB (1) GB2230122B (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289400A (en) * 1992-07-30 1994-02-22 Westinghouse Electric Corp. Single-flux-quantum multiply-accumulator
US5446909A (en) * 1992-12-11 1995-08-29 National Semiconductor Corporation Binary multiplication implemented by existing hardware with minor modifications to sequentially designate bits of the operand
US5602767A (en) * 1995-08-29 1997-02-11 Tcsi Corporation Galois field polynomial multiply/divide circuit and a digital signal processor incorporating same
US5751619A (en) * 1996-01-22 1998-05-12 International Business Machines Corporation Recurrent adrithmetical computation using carry-save arithmetic
US5784011A (en) * 1996-06-14 1998-07-21 Lsi Logic Corporation Multiplier circuit for performing inverse quantization arithmetic
US6549593B1 (en) * 1999-07-19 2003-04-15 Thomson Licensing S.A. Interface apparatus for interfacing data to a plurality of different clock domains
US6438570B1 (en) * 1999-07-21 2002-08-20 Xilinx, Inc. FPGA implemented bit-serial multiplier and infinite impulse response
US6651079B1 (en) * 2000-07-18 2003-11-18 Agere Systems Inc. High speed pipeline multiplier with virtual shift
DE10041511C1 (de) * 2000-08-24 2001-08-09 Infineon Technologies Ag Additionsschaltung für digitale Daten
US8438207B2 (en) * 2007-09-28 2013-05-07 University Of Washington Adaptive precision arithmetic unit for error tolerant applications

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3290493A (en) * 1965-04-01 1966-12-06 North American Aviation Inc Truncated parallel multiplication
US3582634A (en) * 1968-10-15 1971-06-01 Stromberg Carlson Corp Electrical circuit for multiplying serial binary numbers by a parallel number
US3761699A (en) * 1972-03-28 1973-09-25 Collins Radio Co Multiplication by successive addition with two{40 s complement notation
US4013879A (en) * 1975-06-02 1977-03-22 International Telephone And Telegraph Corporation Digital multiplier
JPS56143051A (en) * 1980-04-07 1981-11-07 Nec Corp Data shift circuit
JPS58129653A (ja) * 1982-01-29 1983-08-02 Hitachi Ltd 乗算方式
DE3335424A1 (de) * 1983-09-29 1985-04-18 Siemens AG, 1000 Berlin und 8000 München Multiplikationswerk und verfahren zu dessen betrieb
GB8401808D0 (en) * 1984-01-24 1984-02-29 Int Computers Ltd Binary multiplication
JPH07107664B2 (ja) * 1987-02-13 1995-11-15 日本電気株式会社 乗算回路
JP2706455B2 (ja) * 1987-10-14 1998-01-28 松下電器産業株式会社 小数乗算器

Also Published As

Publication number Publication date
GB9007451D0 (en) 1990-05-30
GB2230122A (en) 1990-10-10
DE4010735A1 (de) 1990-10-11
FR2645294A1 (fr) 1990-10-05
GB2230122B (en) 1993-01-20
KR900016888A (ko) 1990-11-14
JPH02292632A (ja) 1990-12-04
FR2645294B1 (fr) 1994-11-18
CA2012808C (fr) 1999-09-21
US4970676A (en) 1990-11-13
CA2012808A1 (fr) 1990-10-04
DE4010735C2 (fr) 1992-05-07

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