KR920007234A - Enmoose BLDD manufacturing method - Google Patents

Enmoose BLDD manufacturing method Download PDF

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Publication number
KR920007234A
KR920007234A KR1019900014500A KR900014500A KR920007234A KR 920007234 A KR920007234 A KR 920007234A KR 1019900014500 A KR1019900014500 A KR 1019900014500A KR 900014500 A KR900014500 A KR 900014500A KR 920007234 A KR920007234 A KR 920007234A
Authority
KR
South Korea
Prior art keywords
gate
enmoose
bldd
followed
create
Prior art date
Application number
KR1019900014500A
Other languages
Korean (ko)
Other versions
KR930009480B1 (en
Inventor
이혁재
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900014500A priority Critical patent/KR930009480B1/en
Publication of KR920007234A publication Critical patent/KR920007234A/en
Application granted granted Critical
Publication of KR930009480B1 publication Critical patent/KR930009480B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02293—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process formation of epitaxial layers by a deposition process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers

Abstract

내용 없음No content

Description

엔모오스 BLDD 제조방법Enmoose BLDD manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도(A)~(F)는 본 발명에 따른 엔모오스 BLDD 제조공정도2 (A) to (F) is a manufacturing process diagram of the enmoose BLDD according to the present invention

Claims (1)

P형 실리콘 기판 위에 게이트 옥사이드를 만들고 보론을 이온주입 한후 폴리실리콘과 옥사이드를 차례로 디포지션한 다음 에치하여 게이트를 만들고 게이트 측면을 옥사데이션하고, 그다음 게이트를 마스크로 써서 실리콘 기판을 에치한후 적은 에너지의 비소를 이온주입하여 베리드 N영역을 만들고 N-타입으로 셀렉티브 에피텍시를 하여 소오스 드레인쪽의 실리콘을 재성장 시킴으로서 N-영역(6)을 만든다음 사이드월을 만들고 이온주입을 실시하여 N+소오스 드레인 영역을 형성하는 것을 특징으로 하는 엔모오스 BLDD제조방법.A gate oxide is formed on the P-type silicon substrate, followed by ion implantation of boron, followed by deposition of polysilicon and oxide, followed by etching to form a gate, oxidizing the gate side, and then etching the silicon substrate using the gate as a mask, and then using less energy. by the arsenic ion implantation to create a buried N region N - type with Selective epi to the Tec when re-growth of the source and drain side of the silicon sikimeuroseo N - subjected to create the area 6, and then the ion implantation to create a sidewall N + A method for producing an enmoose BLDD, comprising forming a source drain region. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900014500A 1990-09-13 1990-09-13 Manufacturing method of semiconductor device KR930009480B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900014500A KR930009480B1 (en) 1990-09-13 1990-09-13 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014500A KR930009480B1 (en) 1990-09-13 1990-09-13 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
KR920007234A true KR920007234A (en) 1992-04-28
KR930009480B1 KR930009480B1 (en) 1993-10-04

Family

ID=19303579

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014500A KR930009480B1 (en) 1990-09-13 1990-09-13 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR930009480B1 (en)

Also Published As

Publication number Publication date
KR930009480B1 (en) 1993-10-04

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