KR910010631A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR910010631A
KR910010631A KR1019890016609A KR890016609A KR910010631A KR 910010631 A KR910010631 A KR 910010631A KR 1019890016609 A KR1019890016609 A KR 1019890016609A KR 890016609 A KR890016609 A KR 890016609A KR 910010631 A KR910010631 A KR 910010631A
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KR
South Korea
Prior art keywords
temperature
impurity
semiconductor device
manufacturing
impurity penetration
Prior art date
Application number
KR1019890016609A
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Korean (ko)
Inventor
윤석봉
유정식
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019890016609A priority Critical patent/KR910010631A/en
Publication of KR910010631A publication Critical patent/KR910010631A/en

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Abstract

내용 없음No content

Description

반도체 장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제5도는 본 발명의 침투공정의 시퀸스를 나타낸 도면이다5 is a diagram showing a sequence of the penetration process of the present invention.

제6도는 종래의 침투공정후 생성된 결점을 나타낸 도면6 is a view showing the defects generated after the conventional infiltration process

제7도 내지 제12도는 침투공정후 AES 장치로 분석한 결과를 나타낸 도면7 to 12 are views showing the results analyzed by the AES device after the infiltration process

Claims (1)

로의 온도를 상승시키기 위한 온도가열스텝, 기판 안으로 불순물을 침투시키기 위한 불순물침투 스텝, 온도를 본래대로 환원시키기 위한 온도냉각스텝을 순차적으로 진행하여 웰 구조를 형성하는 반도체 소자의 제조공정에 있어서, 상기 불순물 침투 스텝시 제1불순물 침투 스텝에서는 N2와 높은 02(High-02)를 사용하고 , 제2불순물 침투 스텝에서는 N2와 미세 O2 (Low-o2)를 혼용하여 불순물을 침투시킴으로써 N2가 Si나 SiO2와 반응하는 것을 억제시켜 폴리실리콘막 및 산화막상에 옥시나이트 라이드성 결점의 생성을 방지하는 것을 특징으로 하는 반도체장치의 제조방법.In the process of manufacturing a semiconductor device to form a well structure by sequentially performing a temperature heating step for raising the temperature of the furnace, an impurity penetration step for penetrating impurities into the substrate, and a temperature cooling step for reducing the temperature intact. In the impurity penetration step, N2 and high 02 are used in the first impurity penetration step, and N2 is mixed with N2 and fine O2 (Low-o2) in the second impurity penetration step to infiltrate the impurity. And suppressing the reaction with to prevent the formation of oxynitride defects on the polysilicon film and the oxide film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890016609A 1989-11-16 1989-11-16 Manufacturing Method of Semiconductor Device KR910010631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890016609A KR910010631A (en) 1989-11-16 1989-11-16 Manufacturing Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890016609A KR910010631A (en) 1989-11-16 1989-11-16 Manufacturing Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR910010631A true KR910010631A (en) 1991-06-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890016609A KR910010631A (en) 1989-11-16 1989-11-16 Manufacturing Method of Semiconductor Device

Country Status (1)

Country Link
KR (1) KR910010631A (en)

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