KR910008816A - 다이부착 공정방법 - Google Patents
다이부착 공정방법 Download PDFInfo
- Publication number
- KR910008816A KR910008816A KR1019890014609A KR890014609A KR910008816A KR 910008816 A KR910008816 A KR 910008816A KR 1019890014609 A KR1019890014609 A KR 1019890014609A KR 890014609 A KR890014609 A KR 890014609A KR 910008816 A KR910008816 A KR 910008816A
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- die attach
- die
- attach process
- elongation
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 웨이퍼를 절단하기 위해 웨이퍼, 웨이퍼 마운팅 테이프 및 필름 프레임 케리어를 나타낸 도면,
제 2 도는 다이 부착공정에서 다이를 픽업(Pick Up)하는 공정을 나타낸 도면
Claims (2)
- 고집적 반도체 소자의 공정중에서 웨이퍼를 웨이퍼 마운팅 테이퍼 상부에 올려놓고 웨이퍼를 일부 절단한 다음 상기 웨이퍼의 절단된 다이를 픽업하여 소정부분에 부착하는 다이부착 공정방법에 있어서, 상기 웨이퍼 마운팅 테이퍼의 표면을 광흡수용 물질로 처리하고 그의 두께, 신장율 및 접착력을 조절하여, 상기 웨이퍼 마운팅 테이퍼 상부에 웨이퍼를 올려놓고, 웨이퍼를 완전히 절단하는 것을 특징으로 하는 다이부착 공정방법.
- 제 1 항에 있어서, 상기 웨이퍼 마운팅 테이퍼의 두께는 0.125mm이고, 신장율은 220%이며, 접착력은 120g/25mm인 것을 특징으로 하는 다이부착 공정방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890014609A KR920008150B1 (ko) | 1989-10-12 | 1989-10-12 | 다이분리 공정방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890014609A KR920008150B1 (ko) | 1989-10-12 | 1989-10-12 | 다이분리 공정방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910008816A true KR910008816A (ko) | 1991-05-31 |
KR920008150B1 KR920008150B1 (ko) | 1992-09-22 |
Family
ID=19290592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890014609A KR920008150B1 (ko) | 1989-10-12 | 1989-10-12 | 다이분리 공정방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR920008150B1 (ko) |
-
1989
- 1989-10-12 KR KR1019890014609A patent/KR920008150B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR920008150B1 (ko) | 1992-09-22 |
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E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20020820 Year of fee payment: 11 |
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LAPS | Lapse due to unpaid annual fee |