KR910006094B1 - Burying layer forming process using revolution-application of extrinsic metal - Google Patents
Burying layer forming process using revolution-application of extrinsic metal Download PDFInfo
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- KR910006094B1 KR910006094B1 KR1019880003706A KR880003706A KR910006094B1 KR 910006094 B1 KR910006094 B1 KR 910006094B1 KR 1019880003706 A KR1019880003706 A KR 1019880003706A KR 880003706 A KR880003706 A KR 880003706A KR 910006094 B1 KR910006094 B1 KR 910006094B1
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000002184 metal Substances 0.000 title 1
- 239000012535 impurity Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000001259 photo etching Methods 0.000 claims abstract 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000009792 diffusion process Methods 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 23
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 20
- 229920002120 photoresistant polymer Polymers 0.000 description 11
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 6
- 238000005137 deposition process Methods 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000035515 penetration Effects 0.000 description 4
- 238000010306 acid treatment Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000005406 washing Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008595 infiltration Effects 0.000 description 2
- 238000001764 infiltration Methods 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
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Abstract
Description
제1도는 회전도포 불순물원을 이용한 종래의 매몰층 형성공정을 보인 설명도.1 is an explanatory diagram showing a conventional buried layer forming process using a rotating coating impurity source.
제2도는 회전도포 불순물원을 이용한 본 발명의 매몰층 형성공정을 보인 설명도.2 is an explanatory diagram showing a buried layer forming process of the present invention using a rotating coating impurity source.
본 발명은 반도체를 제조하기 위하여 회전도포 불순물원을 도포한 후 이에 의한 매몰층(Buried layer)을 형성하기 위한 공정에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process for forming a buried layer by applying a rotating coating impurity source to manufacture a semiconductor.
종래에는 매몰층을 얻기위하여 먼저 기판(Substrate wafer)의 표면을 산소나 수증기속에 노출시키고 1000℃정도로 가열하여 SiO2층을 형성시키며, 이어서 제1c도에 도시된 바와 같이 그 표면에 포토레지스트(Photoresist)를 바르고 마스크를 그 표면에 밀착시키며 자외선에 노출시킨 후 기판을 화학약품속에 넣어서 불필요한 포토레지트를 제거하면 제1c도에 보인 상태와 같이 일부의 포토레지스트만이 남아있게 되고 이를 불화수소산 용액에 넣어 포토레지스트에 덮이지 않은 부분의 SiO2층을 부식시킨다.Conventionally, in order to obtain a buried layer, the surface of a substrate (Substrate wafer) is first exposed to oxygen or water vapor and heated to about 1000 ° C. to form a SiO 2 layer, and then a photoresist is formed on the surface as shown in FIG. ), Close the mask to the surface, expose it to UV light, and then put the substrate into the chemical to remove the unnecessary photoresist, leaving only some photoresist as shown in Figure 1c. To corrode the SiO 2 layer in the portion not covered by the photoresist.
이와 같이하여 얻은 기판위에 제1f도에 보인 상태와 같은 As 등의 불순물원을 떨어뜨린 후 기판을 회전시키면 거의 균일한 두께로 불순물이 도포되고 이를 약 1170℃정도로 가열하여 제1g도에 도시된 바와 같이 침적공정을 시행함으로써 불순물을 일부 확산시킨 후 이어서 제1h도에 도시된 바와 같이 불산으로 침적공정에서 형성된 산화막 및 잔류 불순물을 제거하고 물로 세정하여 이어지는 제1i도에서 보인 바의 침투 공정에서 불순물의 침투 깊이를 조절하게 되는 것이다.After dropping an impurity source such as As on the substrate obtained as shown in FIG. 1f and rotating the substrate, the impurity is applied to an almost uniform thickness and heated to about 1170 ° C., as shown in FIG. As a result of the deposition process, some impurities are diffused, and then, as shown in FIG. 1h, the oxide film and residual impurities formed in the deposition process are removed with hydrofluoric acid and washed with water to remove impurities. The depth of penetration is controlled.
즉, 불산처리 및 세정완료 후의 기판을 약 1170℃정도로 가열하면 기판으로 일부 확산된 불순물이 그 양에 따라 본격적으로 침투하여 예정된 깊이 만큼 확산 완료하게 됨으로써 침투공정이 이루어지는 것이며, 이러한 상태를 보인 것이 제1i 도이고 이를 수세함으로써 불순물의 확산 공정이 완료되어 매몰층을 형성할 수 있게 되는 것이고 필요에 따라 에피렉설층의 성장이 이루어지게 할수 있는 것이다. 그러나 이와 같은 종래의 매몰층 형성공정은 몇가지 문제점을 안고 있는 것이다.That is, when the substrate after the hydrofluoric acid treatment and cleaning is heated to about 1170 ° C., some of the impurities diffused into the substrate penetrate in earnest according to the amount thereof, and the diffusion is completed by a predetermined depth, thereby performing the penetration process. It is 1i degree and by washing with water it is possible to complete the diffusion process of the impurity to form a buried layer and to grow the epirexol layer as needed. However, such a conventional investment layer forming process has some problems.
즉, 침적공정이 완료된 후 침적공정중에 형성된 SiO2층과 표면에 노출되어 있는 회전 도포된 불순물원을 제거하기 위하여 불산처리를 하는 도중 불산 및 이에 함유된 각종 불순물의 분자가 실리콘 결정구조속에 들어가 결정 결함이 발생하게 되며 이때 기판의 온도가 불산처리시의 결정 결함이 가장 많이 발생하는 온도인 1175℃에 근접되어 있으므로 결정 결함 발생 빈도가 극대화되어 목적하는 반도체로서의 성능저하를 초래하게 되며 또한 침적 공정시행 후 불산 및 수세처리하여야 하고 이어서 침투공정을 시행하여야 하는 것이어서 공정 진행에 많은 시간이 소요되므로 생산성이 저하되는 문제점이 있었다.That is, after the deposition process is completed, the hydrofluoric acid and various impurities contained therein enter the silicon crystal structure during hydrofluoric acid treatment to remove the SiO 2 layer formed during the deposition process and the spin coated impurity source exposed on the surface. Defects are generated. At this time, since the temperature of the substrate is close to 1175 ° C, the temperature at which crystal defects occur most during hydrofluoric acid treatment, the frequency of crystal defects is maximized, resulting in deterioration of performance as a desired semiconductor. After the hydrofluoric acid and washed with water and then the infiltration process to be carried out there is a problem that the productivity is reduced because the process takes a lot of time.
본 발명은 이상에서 살펴본 바와 같이 종래의 매몰층 형성공정이 안고있는 문제점을 해결하기 위하여 상대적으로 낮은 온도에서 진행하던 침적 공정과 상대적으로 높은 온도에서 진행하던 침투공정을 통합하여 높은 온도에서 불순물의 확산 공정을 진행함으로써 결정 결함을 감소시키고 공정을 단순화하며 또한 불순물도포층의 두께를 조절함으로써 확산층과 기판간의 정확한 면저항 조절이 가능하도록한 것으로 이를 첨부된 도면에 따라 상세히 설명하면 다음과 같다.As described above, in order to solve the problems of the conventional buried layer forming process, the diffusion of impurities at a high temperature by incorporating a deposition process performed at a relatively low temperature and a penetration process performed at a relatively high temperature. By proceeding the process to reduce the crystal defects, simplify the process and also to control the accurate sheet resistance between the diffusion layer and the substrate by controlling the thickness of the impurity coating layer, which will be described in detail according to the accompanying drawings.
먼저 제1도에 도시한 바와 같이 기판의 표면을 정결하게 닦아낸 후 산소나 수증기속에 노출시키고 1000℃정도로 가열하여 소정의 두께 만큼의 SiO2층을 형성시키며, 그 위에 감광제인 포토레지스트를 균일하게 도포한다.First, as shown in FIG. 1, the surface of the substrate is wiped clean, exposed to oxygen or water vapor, heated to about 1000 ° C. to form a SiO 2 layer having a predetermined thickness, and a photoresist as a photoresist is uniformly formed thereon. Apply.
이어서 SiO2층에서 제거하여할 부분과 남겨놓을 부분으로 구분한 마스크를 포토레지스트 위에 덮고 자외선에 노출시키면 자외선에 감광된 부분은 중합되는 것이고 즉시 마스크를 제거한 후 3염화에틸렌등의 약품속에 넣어 중합되지 않은 부분의 포토레지스트를 용해시키고 나면 중합된 부분은 제1c도에 모인 상태가 되는 것이다.Subsequently, the mask divided into the part to be removed and the part to be removed from the SiO 2 layer is covered over the photoresist and exposed to ultraviolet light, and the part exposed to the ultraviolet light is polymerized. After dissolving the photoresist in the portion that is not present, the polymerized portion is brought into the state shown in FIG.
이어서 기판을 불화수소산속에 넣으면 포토레지스트가 덮이지 아니한 부분의 SiO2층은 부식되는 것이고 포토레지스트로 덮인 영역의 SiO2층은 아무런 영향을 받지 않고 기판의 표면에 남게되며 이때에 여전히 남아있는 중합된 포토레지스트는 기계적으로 소아내거나 진한 황상 등의 화학적인 용제로서 제거시킨다.Subsequently, when the substrate is placed in hydrofluoric acid, the SiO 2 layer in the portion not covered with the photoresist is corroded, and the SiO 2 layer in the region covered with the photoresist remains unaffected on the surface of the substrate, at which time the remaining polymerized The photoresist is mechanically removed as a chemical solvent such as pediatric or dark yellow.
아울러 As 등의 불순물원을 떨어뜨린 후 기판을 회전시키면 그표면위에 제2a도에 보인 바와 같이 거의 균일한 두께로 불순물이 도포되고 이를 1200℃정도로 가열하여 주면 불순물이 신속하게 기판으로 침투함과 동시에 그 표면이 산화되는 바 이때 불순물 확산 부위 표면은 산화가 더욱 활발하게 이루어지므로 결국 미처 기판으로 침투하지 못한 불순물은 계속 생성되는 SiO2층속에 포함되어 제2c도에 보인 상태가 되고 그러므로 침적 및 침투 공정이 일시에 이루어질 수 있는 것이며, 따라서 기판에는 매몰층이 적절한 깊이로 형성될 수 있는 것이고 불산 및 그에 함유된 불순물에 의한 결정구조의 결함이 전혀 없게 되어 고품질의 반도체 제품을 생산할 수 있게 되는 것이다.When the substrate is rotated after dropping an impurity source such as As, as shown in FIG. 2a, impurities are applied on the surface with an almost uniform thickness, and when heated to 1200 ° C., impurities quickly penetrate into the substrate. As the surface is oxidized, the surface of the impurity diffusion site becomes more active, so that impurities that do not penetrate into the substrate are included in the SiO 2 layer which is continuously formed and are shown in FIG. In this case, the buried layer can be formed to an appropriate depth in the substrate, and there is no defect in the crystal structure due to the hydrofluoric acid and impurities contained therein, thereby producing a high quality semiconductor product.
그리고 이러한 상태의 기판 표면위에 부착되어 있는 SiO2층과 As등 불순물원을 불산 및 수세처리로써 임의 제거하여 불순물 확산을 완료할 수 있게 되는 것이며, 아울러 본 발명에서의 매몰층과 기판간의 면저항은 불순물의 도포두께에 따라 결정되는 것이어서 그 조절이 용이하며 또한 1회의 가열 과정중에 불순물의 침적공정과 침투공정이 이루어져야 하므로 SiO2층을 두텁게 형성하여 침투공정이 완료될때까지 As 등의 불순물이 기판에 침투하지 못하도록 하여야 함은 물론이다.In addition, it is possible to complete the diffusion of impurities by randomly removing the source of impurities such as SiO 2 layer and As deposited on the substrate surface in this state by hydrofluoric acid and washing with water, and the sheet resistance between the buried layer and the substrate in the present invention is impurity. As it is determined by the coating thickness of, it is easy to control and also the impurity deposition and penetration process must be done during one heating process. Therefore, impurities such as As penetrate into the substrate until thick SiO 2 layer is formed. Of course it should not be.
이와 같이하여 본 발명은 종전의 불순물 침적공정과 불산 그리고 수세처리 및 침투공정으로 이어지는 매몰층 형성공정이 매우 단순화되어 생산성을 개선할 수 있게 될뿐만 아니라 결정 결함이 없게 되어 누설 전류가 없는 고품질의 제품을 얻을 수 있게 되고 매몰층과 기판간의 면저항 조절이 용이하게 되는 등의 다대한 장점을 갖는 것이다.As such, the present invention greatly simplifies the buried layer forming process leading to the impurity deposition process, the hydrofluoric acid, and the water washing process and the infiltration process, thereby improving productivity and eliminating crystal defects, thereby ensuring a high quality product without leakage current. It can be obtained and has a great advantage, such as easy to control the sheet resistance between the buried layer and the substrate.
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