KR910003459Y1 - Character combining circuit in vtr - Google Patents

Character combining circuit in vtr Download PDF

Info

Publication number
KR910003459Y1
KR910003459Y1 KR2019870015328U KR870015328U KR910003459Y1 KR 910003459 Y1 KR910003459 Y1 KR 910003459Y1 KR 2019870015328 U KR2019870015328 U KR 2019870015328U KR 870015328 U KR870015328 U KR 870015328U KR 910003459 Y1 KR910003459 Y1 KR 910003459Y1
Authority
KR
South Korea
Prior art keywords
signal
character
output
text
video signal
Prior art date
Application number
KR2019870015328U
Other languages
Korean (ko)
Other versions
KR890007504U (en
Inventor
김용진
Original Assignee
삼성전자 주식회사
안시환
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 안시환 filed Critical 삼성전자 주식회사
Priority to KR2019870015328U priority Critical patent/KR910003459Y1/en
Publication of KR890007504U publication Critical patent/KR890007504U/en
Application granted granted Critical
Publication of KR910003459Y1 publication Critical patent/KR910003459Y1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/44504Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Studio Circuits (AREA)

Abstract

내용 없음.No content.

Description

문자 혼합회로Character mixing circuit

제 1 도는 종래의 회로도.1 is a conventional circuit diagram.

제 2 도는 본 고안의 회로도.2 is a circuit diagram of the present invention.

제 3 도는 제 2 도에 따른 파형도이다.3 is a waveform diagram according to FIG. 2.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 동기신호발생부 2 : 문자발생부1: Synchronization signal generator 2: Character generator

3 : 문자신호출력부 4 : 아날로그스위치3: character signal output unit 4: analog switch

5 : 시정수회로 VIN : 영상신호입력단5: Time constant circuit VIN: Video signal input terminal

CTL : 컴퓨터제어신호 OUT : 혼합신호출력단CTL: Computer Control Signal OUT: Mixed Signal Output Terminal

C1-C3: 콘덴서 L1: 코일C 1 -C 3 : Condenser L 1 : Coil

R1-R5: 저항 TR1, TR2: 트랜지스터R 1 -R 5 : Resistor TR 1 , TR 2 : Transistor

본 고안은 VTR을 사용하여 영산신호의 재생과 문자표시를 동시에 하고자 할때 영상신호에다 문자신호를 혼합시키도록 하는 문자혼합 회로에 관한 것이다.The present invention relates to a character mixing circuit for mixing a character signal with an image signal when simultaneously using a VTR for reproduction and character display.

종래의 문자혼합회로는 제 1 도에 도시된 바와같이, 영상신호입력단(VIN)의 영상신호와 문자신호출력부(3)의 문자신호를 컴퓨터로부터 공급되는 제어신호(CTL)에 의해 아날로그스위치(4)에서 절환시키므로써 출력단(OUT)에 출력시키게 되는데, 그에따라 영상신호와 문자신호를 복합시키지 못하고 영상신호 또는 문자신호만을 출력시키게 되어 영상신호의 표시중에는 문자표실르 할수 없다고 하는 결점이 있었다.In the conventional character mixing circuit, as shown in FIG. 1, an analog switch (B) by means of a control signal (CTL) supplied from a computer with the video signal of the video signal input terminal VIN and the text signal of the text signal output unit 3 is provided. 4) it is outputted to the output terminal (OUT). As a result, the video signal and the text signal are not combined and only the video signal or the text signal is output.

이에 본 고안은 상기한 결점을 해소하기 위해 문자신호와 문자신호를 지연시킨 신호를 오아게이트로 합성하여 아날로그스위치를 제어하게 하므로써 영상신호중 문자가 표시된 영역을 확보해 놓고 그 영역중 문자신호를 출력시키므로써 영상신호와 문자신호를 혼합하여 동시에 표시하도록 한 문자혼합회로를 제공함에 그 목적이 있는 것으로, 이를 첨부도면에 의거하여 상세히 설명하면 다음과 같다.In order to solve the above-described drawbacks, the present invention synthesizes a text signal and a delayed text signal into an oragate to control an analog switch, thereby securing an area where a character is displayed in the video signal and outputting a text signal in the area. It is an object of the present invention to provide a character mixing circuit for mixing and displaying a video signal and a text signal at the same time, which will be described in detail with reference to the accompanying drawings.

제 2 도는 본 고안의 문자혼합회로에 대한 회로도를 나타내는 것으로, 동기신호발생부(1)에는 수직동기신호(VS)와 수평수직복합동기신호(HVS)를 발생하여 출력시키는데, 안테나를 통한 신호입력이나 외부신호입력, 카세트테이프의 재생시동에 위신호를 발생시킨다. 또, 영상신호원이 없을 때에는 자체적으로 위 동기신호를 발생시킨다.2 shows a circuit diagram of the character mixing circuit of the present invention, and generates and outputs a vertical synchronizing signal VS and a horizontal vertical complex synchronizing signal HVS to the synchronizing signal generating unit 1 through a signal input through an antenna. This signal is also generated when the external signal is input or the cassette tape is started up. When there is no video signal source, the above synchronization signal is generated by itself.

한편 문자발생부(2)는 사용자의 요구에 따라 문자신호를 발생하는 회로로써 동기신호발생부(1)로 부터 공급받는 수직동기신호(VS)와 수평수직복합동기신호(HVS)에 동기를 맞춰 문자신호를 발생시킨다.On the other hand, the character generator 2 is a circuit for generating a character signal according to the user's request, in synchronization with the vertical synchronous signal VS and the horizontal vertical composite synchronous signal HVS supplied from the synchronization signal generator 1. Generates a text signal.

이에 따라 발생된 문자신호는 저항(R1)과 콘덴서(C1) 및 코일(L1)에 의해 필터링되어 잡음성분이 제거된 다음 트랜지스터(TR1)의 베이스에 공급되고, 트린지스터(TR1)의 콜렉터에는 저항(R2-R4)이 직렬로 연결되어있어 동기신호발생부(1)에서 출력되는 수평 수직복합동기신호(HVS)가 저항(R2)(R3)의 접속점에 공급되므로 저항(R3)(R4)의 접속점에는 수평수직복합동기신호(HVS)와 문자발생부(2)의 문자신호가 복합되어 나타난다. 이 복합된 문자신호는 저항(R5)(R6)을 통해 트랜지스터(TR2)에 공급되어 반전되고, 정극성의 문자신호로 되어 콘덴서(C2)를 통해 아날로그스위치(4)의 한쪽입력단에 공급된다. (제 3c 도)The generated text signal is filtered by the resistor R 1 , the capacitor C 1 , and the coil L 1 to remove noise components, and then is supplied to the base of the transistor TR 1 , and the transistor TR 1. ), The resistors R 2 -R 4 are connected in series, so that the horizontal vertical composite synchronous signal HVS output from the synchronization signal generator 1 is supplied to the connection point of the resistors R 2 (R 3 ). Therefore, the horizontal vertical composite synchronization signal HVS and the character signal of the character generator 2 are combined at the connection point of the resistor R 3 and R 4 . The combined character signal is supplied to the transistor TR 2 through the resistor R 5 and R 6 , and is inverted, and becomes a positive character signal to the input terminal of the analog switch 4 through the capacitor C 2 . Supplied. (Figure 3c)

이때 문자발생부(2)에서 출력된 문자신호는 직접 오아게이트(OR)의 입력단에 공급됨과 더불어 저항(R9)과 콘덴서(C3)의 시정수회로(5)에 의해 지연되어 오아게이트(OR)의 다른 입력단에 공급되므로(제 3d 도)오아게이트(OR)의 출력은 지연된 시간을 포함하여 제 3e 도와 같이 출력되어서 문자표시 시간영역을 확보한다. 이 오아게이트(OR)의 출력은 다이오드(D1)를 통해 아날로그스위치(4)를 제어하므로써 영상 신호입력단(VIN)의 신호를 출력단(OUT)에 출력시키다가 문자신호출력시 영상신호를 차단하고 문자신호를 출력단(OUT)에 공급한다. 또한 아날로그스위치(4)는 컴퓨터의 제어신호(CTL)에 의해서도 다이오드(D2)를 통하여 제어받을 수 있다. 이때는 영상신호는 완전차단되고 문자신호만 출력된다.At this time, the character signal output from the character generator 2 is directly supplied to the input terminal of the oragate OR, and is delayed by the time constant circuit 5 of the resistor R 9 and the capacitor C3. Since the output of the OR gate OR is supplied to the other input terminal of FIG. The output of the OR gate (OR) outputs the signal of the video signal input terminal (VIN) to the output terminal (OUT) by controlling the analog switch (4) through the diode (D 1 ), and cuts the video signal at the time of text signal output. The character signal is supplied to the output terminal OUT. In addition, the analog switch 4 may be controlled through the diode D 2 by the control signal CTL of the computer. At this time, the video signal is completely blocked and only the text signal is output.

이와같이 하여 출력단(OUT)는 영상신호가 공급되고 있다가 문자신호가 발생할 때만 영상신호에서 문자신호를 선택하게 되어 제 3f 도와 같이 영상신호에 문자신호를 혼합할 수 있게 되는 것이다.In this way, the output terminal OUT selects the text signal from the video signal only when the video signal is supplied and the video signal is generated, so that the text signal can be mixed with the video signal as shown in FIG. 3f.

상기한 바와같이 본 고안은 문자신호가 존재할때만 아날로그스위치를 제어하여 영상신호를 차단하고 문자신호를 출력시키도록 하므로써 영상신호에 문자신호를 혼합하여 표시할 수 있는 효과가 있다.As described above, the present invention controls the analog switch only when there is a text signal, thereby blocking the video signal and outputting the text signal, thereby mixing and displaying the text signal on the video signal.

Claims (1)

동기신호발생부(1)와 문자발생부(2)의 출력신호를 입력으로 하고 저항(R1-R8)과 콘덴서(C1)(C2), 코일(L1) 및 트랜지스터(TR1)(TR2)로 구성되어 입력신호에 따라 문자신호를 출력하는 문자신호출력부(3)와 영상신호입력단(VIN)의 신호를 아날로그스위치(4)를 통해 컴퓨터의 제어신호(CTL)로 절환하여서 출력단(OUT)에 문자와 영상신호를 혼합출력시키는 문자혼합회로에 있어서, 문자발생부(2)의 출력단에다 오아게이트(OR)의 한쪽입력단을 직접연결함과 더불어 저항(R9)과 콘덴서(C3)의 시정수회로(5)를 매개하여 오아게이트(OR)의 다른쪽 입력단을 연결하고, 오아게이트(OR)의 출력단에는 다이오드(D1)를 매개하여 컴퓨터의 제어신호(CTL)와 함께 아날로그스위치(4)의 제어단자를 연결하여서 영상신호에 문자신호를 혼합시키도록된 것을 특징으로 하는 문자 혼합회로.The output signals of the synchronization signal generator 1 and the character generator 2 are input, and the resistors R 1 to R 8 , the capacitors C 1 , C 2 , the coil L 1 , and the transistor TR 1 are inputted. (TR 2 ) and converts the signal of the character signal output unit (3) and the image signal input terminal (VIN) for outputting the character signal according to the input signal to the control signal (CTL) of the computer through the analog switch (4) In the character mixing circuit for mixing and outputting a character and a video signal to the output terminal OUT, a resistor R 9 and a condenser are connected directly to the output terminal of the character generator 2 with one input terminal of the OR gate OR. The other input terminal of the OR gate is connected through the time constant circuit 5 of (C 3 ), and the control signal CTL of the computer is connected to the output terminal of the OR gate through the diode D 1 . Characters characterized in that to connect the control terminal of the analog switch (4) with the video signal mixed with the text signal A conference.
KR2019870015328U 1987-09-08 1987-09-08 Character combining circuit in vtr KR910003459Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019870015328U KR910003459Y1 (en) 1987-09-08 1987-09-08 Character combining circuit in vtr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019870015328U KR910003459Y1 (en) 1987-09-08 1987-09-08 Character combining circuit in vtr

Publications (2)

Publication Number Publication Date
KR890007504U KR890007504U (en) 1989-05-16
KR910003459Y1 true KR910003459Y1 (en) 1991-05-27

Family

ID=19267629

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019870015328U KR910003459Y1 (en) 1987-09-08 1987-09-08 Character combining circuit in vtr

Country Status (1)

Country Link
KR (1) KR910003459Y1 (en)

Also Published As

Publication number Publication date
KR890007504U (en) 1989-05-16

Similar Documents

Publication Publication Date Title
KR900019002A (en) Combination circuit
JPH0235510B2 (en)
KR910003459Y1 (en) Character combining circuit in vtr
JPS62256521A (en) Phase comparison circuit
KR930007069B1 (en) Displayer in vtr
KR930008026Y1 (en) Video signal processing circuit of on-screen display
KR950006309Y1 (en) Change circuit of vertical & horizontal mode
KR0128090Y1 (en) Osd-driving circuit
JP2573573B2 (en) Plasma display
JPH0837619A (en) Video signal mixing device
KR900009922Y1 (en) Character display controller
KR950007157Y1 (en) Color osd signal circuit
KR940004955Y1 (en) Apparatus for stabilizing osd characters
KR940004960Y1 (en) Super board
JPS5816791B2 (en) raster blanking circuit
KR950000579B1 (en) Method and circuit to output graphic message data in video cassette tape recorder
KR910003465Y1 (en) A black-level stabilization apparatus for tv
KR960010430Y1 (en) Television having on screen display function
KR100191163B1 (en) Synchronism detecting circuit
JPH0510455Y2 (en)
JPS62130082A (en) Television receiver
KR0118645Y1 (en) Video character mixer circuit
KR0140373B1 (en) Automatic frequency oscillation controller
KR920004114Y1 (en) Composite synchronizing selective circuit
KR930007502Y1 (en) Horizontal-sync signal generating apparatus of camcoder

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19961231

Year of fee payment: 7

LAPS Lapse due to unpaid annual fee