KR900702469A - Fakeout Method and Circuit for Display - Google Patents

Fakeout Method and Circuit for Display

Info

Publication number
KR900702469A
KR900702469A KR1019900701037A KR900701037A KR900702469A KR 900702469 A KR900702469 A KR 900702469A KR 1019900701037 A KR1019900701037 A KR 1019900701037A KR 900701037 A KR900701037 A KR 900701037A KR 900702469 A KR900702469 A KR 900702469A
Authority
KR
South Korea
Prior art keywords
display
information
controller
video
main
Prior art date
Application number
KR1019900701037A
Other languages
Korean (ko)
Inventor
아룬 조하리
테쯔지 오구찌
Original Assignee
원본미기재
칩스 앤드 테크놀로지, 인코포레이티드
아스키 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US24587488A priority Critical
Priority to US245,874 priority
Application filed by 원본미기재, 칩스 앤드 테크놀로지, 인코포레이티드, 아스키 코포레이션 filed Critical 원본미기재
Priority to PCT/US1989/003895 priority patent/WO1990003011A1/en
Publication of KR900702469A publication Critical patent/KR900702469A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device; Cooperation and interconnection of the display device with other functional units
    • G06F3/147Digital output to display device; Cooperation and interconnection of the display device with other functional units using display panels
    • G06F3/1475Digital output to display device; Cooperation and interconnection of the display device with other functional units using display panels with conversion of CRT control signals to flat panel control signals, e.g. adapting the palette memory

Abstract

No content

Description

Fakeout Method and Circuit for Display

Since this is an open matter, no full text was included.

1 is a data processing system according to an embodiment of the present invention, 2A and 2B are arrangements of a main circuit, an alternative circuit and a selection circuit according to an embodiment of the present invention, and FIG. 3 is a timing diagram according to a first embodiment of the present invention. Block diagram of the controller subsystem for generating signals.

Claims (9)

  1. The controller in a data processing system having a processor, a video display device, a memory for storing video display information, a video controller for interacting with the memory to provide video information to the display device and receiving input from the processor; A plurality of main circuits, each for generating main video information, each having a function corresponding to one of the main circuits, and a corresponding number of alternate circuits for generating replacement video information, respectively receiving main video information and the replacement video information; And a plurality of selection circuit means for receiving the identification signal from the display apparatus for generating display identification information, wherein each selection circuit means draws the main video information when the display apparatus is the selected display and the display apparatus. And respond to the display identification to provide alternate video information as an output when is different from the selected display.
  2. The controller of claim 1, wherein at least one of the alternative circuits is programmable.
  3. The controller of claim 1, wherein at least one of the alternate circuits is programmed by the processor during the system power up.
  4. The controller of claim 1, wherein the video function comprises at least one of horizontal line size, vertical line size, blanking, link rate, synchronization function, and clock function.
  5. The controller of claim 1, wherein at least one of the main circuits comprises a register.
  6. The controller of claim 1, wherein at least one of the alternative circuits comprises a ledge.
  7. 2. The controller of claim 1 wherein the selected display is a CRT and the other of the selected display is a flat panel display.
  8. The circuit of claim 1, wherein the circuitry for generating the identification information comprises: a; A display device for receiving input from a processor and generating main video information, a main register coupled with the processor, a corresponding substitute register for generating alternate video information, and a combination with the main and alternate registers and for generating display identification information. And selection circuit means for responding to information from the processor for identifying the display identification information comprising the main video function information when the display device is the selected device, and when the display device is different from the selected display. And the substitute video function information.
  9. The system of claim 1, wherein the processing system interfaces with a number of possible display devices, and the controller enables one of a plurality of programming tables corresponding to each display device and the programming table corresponding to the identified display device. Means for decoding the device identification information to program the dacel register during the programming table system power-up, whereby the replacement register may generate replacement video function information for the plurality of display devices. There is a controller.
    ※ Note: The disclosure is based on the initial application.
KR1019900701037A 1988-09-16 1989-09-08 Fakeout Method and Circuit for Display KR900702469A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US24587488A true 1988-09-16 1988-09-16
US245,874 1988-09-16
PCT/US1989/003895 WO1990003011A1 (en) 1988-09-16 1989-09-08 Fakeout method and circuitry for displays

Publications (1)

Publication Number Publication Date
KR900702469A true KR900702469A (en) 1990-12-07

Family

ID=22928448

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900701037A KR900702469A (en) 1988-09-16 1989-09-08 Fakeout Method and Circuit for Display

Country Status (2)

Country Link
KR (1) KR900702469A (en)
WO (1) WO1990003011A1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0519717B2 (en) * 1985-03-19 1993-03-17 Asukii Kk
DE3852149T2 (en) * 1987-06-19 1995-04-06 Toshiba Kawasaki Kk Cathode ray tube / plasma display control unit.

Also Published As

Publication number Publication date
WO1990003011A1 (en) 1990-03-22

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Legal Events

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WITN Withdrawal due to no request for examination