KR900017343A - Dial pulse measuring circuit - Google Patents

Dial pulse measuring circuit Download PDF

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Publication number
KR900017343A
KR900017343A KR1019890005737A KR890005737A KR900017343A KR 900017343 A KR900017343 A KR 900017343A KR 1019890005737 A KR1019890005737 A KR 1019890005737A KR 890005737 A KR890005737 A KR 890005737A KR 900017343 A KR900017343 A KR 900017343A
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KR
South Korea
Prior art keywords
signal
control signal
hook
unit
state
Prior art date
Application number
KR1019890005737A
Other languages
Korean (ko)
Other versions
KR920005922B1 (en
Inventor
최해열
Original Assignee
정용문
삼성전자 주식회사
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Priority to KR1019890005737A priority Critical patent/KR920005922B1/en
Publication of KR900017343A publication Critical patent/KR900017343A/en
Application granted granted Critical
Publication of KR920005922B1 publication Critical patent/KR920005922B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q1/00Details of selecting apparatus or arrangements
    • H04Q1/18Electrical details
    • H04Q1/20Testing circuits or apparatus; Circuits or apparatus for detecting, indicating, or signalling faults or troubles

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

내용 없음.No content.

Description

다이얼펄스 측정회로Dial pulse measuring circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 시스템 블럭도.1 is a system block diagram of the present invention.

제2도는 제1도중 카운트 및 측정부의 상세 회로도.FIG. 2 is a detailed circuit diagram of the count and measurement unit in FIG.

Claims (1)

디지탈 입출력기(20)를 가지며 제1-제6인에이블신호(-, E6)를 발생하는 PC(100)와, 다이얼펄스를 송출하는 장비(300)를 구비한 회로에 있어서, 상기 장비(300)로 부터 다이얼펄스를 입력하여 후크오프 감지신호(HOS) 및 클럭신호(CLK)를 발생하는 라인인터페이스부(30)와, 반전된 후크오프 감지신호를 카운트하여 래치하는 다이얼펄스 카운트부(110)와, 상기 반전된 후크오프 감지신호를 이분주하여 제1제어신호(S1)를 발생하며, 상기 제1제어신호(S1)의 반전신호에 동기되어 상기 후크오프 감지신호(HOS)의 첫번째펄스의 메이크가 끝나는 순간에 제1상태로 되는 제2제어신호(S2)를 발생하는 제어신호 발생부(120)와, 상기 제1제어신호(S1)와 상기 후크오프 감지신호(HOS)가 둘다 제l상태일 경우 상기 클럭신호(CLK)를 카운트하되 상기 제2제어신호(S2)가 제1상태인 순간에만 그 값을 래치하는 메이크시간 측정부(130)와, 상기 제1제어신호(S1)와 상기 반전된 후크오프 감지신호가 둘다 제1상태일 경우 상기 클럭신호를 카운트하되 상기 제2제어신호(S2)가 제1상태인 순간에만 그 값을 래치하는 브레이크 시간 측정부(140)와, 상기카운트 및 측정부(40)로 상기 제1-제6인에이블신호(-,E6)를 송출하며, 상기 카운트 및 측정부(40)로 부터 검출된 다이얼펄스 카운트 값과 메이크/브레이크 시간 측정 값을 상기 디지탈 입출력기(20)로 전송하는 디지탈 입출력 인터페이스부(60)로 구성됨을 특징으로 하는 다이얼펄스 측정회로.Having a digital input / output unit 20 and a first to sixth enable signals ( - In a circuit having a PC 100 generating E6 and a device 300 for transmitting dial pulses, a dial pulse is input from the device 300 to provide a hook-off detection signal (HOS) and a clock signal. The line interface unit 30 generating the CLK, the dial pulse count unit 110 for counting and latching the inverted hook-off detection signal, and the inverted hook-off detection signal are divided into two parts, and the first control signal ( And generating a second control signal S2 which is synchronized with the inverted signal of the first control signal S1 and becomes a first state at the end of the make of the first pulse of the hook-off detection signal HO. When the generated control signal generator 120, the first control signal S1, and the hook-off detection signal HOS are both in the first state, the clock signal CLK is counted, but the second control signal ( A make time measurement unit 130 for latching the value only at the moment when S2) is in the first state, and the first agent A break time measuring unit for counting the clock signal when the signal S1 and the inverted hook-off detection signal are both in the first state, but latching the value only when the second control signal S2 is in the first state ( 140 and the first and sixth enable signals to the count and measurement unit 40. - The digital input / output interface unit 60 transmits E6) and transmits the dial pulse count value and the make / break time measurement value detected from the count and measurement unit 40 to the digital input / output unit 20. Dial pulse measuring circuit, characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890005737A 1989-04-29 1989-04-29 Dial pulse measuring circuit KR920005922B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890005737A KR920005922B1 (en) 1989-04-29 1989-04-29 Dial pulse measuring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890005737A KR920005922B1 (en) 1989-04-29 1989-04-29 Dial pulse measuring circuit

Publications (2)

Publication Number Publication Date
KR900017343A true KR900017343A (en) 1990-11-16
KR920005922B1 KR920005922B1 (en) 1992-07-24

Family

ID=19285763

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890005737A KR920005922B1 (en) 1989-04-29 1989-04-29 Dial pulse measuring circuit

Country Status (1)

Country Link
KR (1) KR920005922B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100362587B1 (en) * 1995-12-30 2003-02-11 삼성전자 주식회사 Method for measuring dial pulse

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100362587B1 (en) * 1995-12-30 2003-02-11 삼성전자 주식회사 Method for measuring dial pulse

Also Published As

Publication number Publication date
KR920005922B1 (en) 1992-07-24

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