KR900008967Y1 - 메모리 억세스장치 - Google Patents

메모리 억세스장치 Download PDF

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Publication number
KR900008967Y1
KR900008967Y1 KR2019870002362U KR870002362U KR900008967Y1 KR 900008967 Y1 KR900008967 Y1 KR 900008967Y1 KR 2019870002362 U KR2019870002362 U KR 2019870002362U KR 870002362 U KR870002362 U KR 870002362U KR 900008967 Y1 KR900008967 Y1 KR 900008967Y1
Authority
KR
South Korea
Prior art keywords
memory
microprocessor
data
signal
data bus
Prior art date
Application number
KR2019870002362U
Other languages
English (en)
Korean (ko)
Other versions
KR870013829U (ko
Inventor
타카시 고도우
Original Assignee
가부시키가이샤 도시바
와타리 스기이치로
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바, 와타리 스기이치로 filed Critical 가부시키가이샤 도시바
Publication of KR870013829U publication Critical patent/KR870013829U/ko
Application granted granted Critical
Publication of KR900008967Y1 publication Critical patent/KR900008967Y1/ko

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • G06F12/0623Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
KR2019870002362U 1986-02-27 1987-02-27 메모리 억세스장치 KR900008967Y1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61-26598 1986-02-27
JP1986026598U JPS62146247U (bg) 1986-02-27 1986-02-27

Publications (2)

Publication Number Publication Date
KR870013829U KR870013829U (ko) 1987-09-10
KR900008967Y1 true KR900008967Y1 (ko) 1990-09-29

Family

ID=30827829

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019870002362U KR900008967Y1 (ko) 1986-02-27 1987-02-27 메모리 억세스장치

Country Status (2)

Country Link
JP (1) JPS62146247U (bg)
KR (1) KR900008967Y1 (bg)

Also Published As

Publication number Publication date
KR870013829U (ko) 1987-09-10
JPS62146247U (bg) 1987-09-16

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