KR900005897B1 - 마이크로프로세서 시스템과 그 메모리 운용장치 - Google Patents

마이크로프로세서 시스템과 그 메모리 운용장치 Download PDF

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Publication number
KR900005897B1
KR900005897B1 KR1019850006490A KR850006490A KR900005897B1 KR 900005897 B1 KR900005897 B1 KR 900005897B1 KR 1019850006490 A KR1019850006490 A KR 1019850006490A KR 850006490 A KR850006490 A KR 850006490A KR 900005897 B1 KR900005897 B1 KR 900005897B1
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KR
South Korea
Prior art keywords
page
memory
address
microprocessor
data
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KR1019850006490A
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English (en)
Korean (ko)
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KR870003427A (ko
Inventor
에이치.크로우포드 존
에스.라이스 폴
Original Assignee
인텔 코포레이숀
에프.토마스 듄랩, 쥬니어
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Application filed by 인텔 코포레이숀, 에프.토마스 듄랩, 쥬니어 filed Critical 인텔 코포레이숀
Publication of KR870003427A publication Critical patent/KR870003427A/ko
Application granted granted Critical
Publication of KR900005897B1 publication Critical patent/KR900005897B1/ko

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1019850006490A 1985-06-13 1985-09-05 마이크로프로세서 시스템과 그 메모리 운용장치 KR900005897B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US74438985A 1985-06-13 1985-06-13
US744389 1985-06-13
JP744389 1985-06-13

Publications (2)

Publication Number Publication Date
KR870003427A KR870003427A (ko) 1987-04-17
KR900005897B1 true KR900005897B1 (ko) 1990-08-13

Family

ID=24992533

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850006490A KR900005897B1 (ko) 1985-06-13 1985-09-05 마이크로프로세서 시스템과 그 메모리 운용장치

Country Status (8)

Country Link
JP (1) JPH0622000B2 (xx)
KR (1) KR900005897B1 (xx)
CN (1) CN1008839B (xx)
DE (1) DE3618163C2 (xx)
FR (1) FR2583540B1 (xx)
GB (2) GB2176918B (xx)
HK (1) HK53590A (xx)
SG (1) SG34090G (xx)

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US5341483A (en) * 1987-12-22 1994-08-23 Kendall Square Research Corporation Dynamic hierarchial associative memory
US5055999A (en) * 1987-12-22 1991-10-08 Kendall Square Research Corporation Multiprocessor digital data processing system
US5313647A (en) * 1991-09-20 1994-05-17 Kendall Square Research Corporation Digital data processor with improved checkpointing and forking
CA2078312A1 (en) 1991-09-20 1993-03-21 Mark A. Kaufman Digital data processor with improved paging
CA2078315A1 (en) * 1991-09-20 1993-03-21 Christopher L. Reeve Parallel processing apparatus and method for utilizing tiling
US5895489A (en) * 1991-10-16 1999-04-20 Intel Corporation Memory management system including an inclusion bit for maintaining cache coherency
GB2260629B (en) * 1991-10-16 1995-07-26 Intel Corp A segment descriptor cache for a microprocessor
CN1068687C (zh) * 1993-01-20 2001-07-18 联华电子股份有限公司 存录多段语音的存储器动态分配方法
EP0613090A1 (de) * 1993-02-26 1994-08-31 Siemens Nixdorf Informationssysteme Aktiengesellschaft Verfahren zur Prüfung der Zulässigkeit von direkten Speicherzugriffen in Datenverarbeitungsanlagen
US5548746A (en) * 1993-11-12 1996-08-20 International Business Machines Corporation Non-contiguous mapping of I/O addresses to use page protection of a process
US5590297A (en) * 1994-01-04 1996-12-31 Intel Corporation Address generation unit with segmented addresses in a mircroprocessor
US6622211B2 (en) * 2001-08-15 2003-09-16 Ip-First, L.L.C. Virtual set cache that redirects store data to correct virtual set to avoid virtual set store miss penalty
KR100406924B1 (ko) * 2001-10-12 2003-11-21 삼성전자주식회사 내용 주소화 메모리 셀
US7689485B2 (en) 2002-08-10 2010-03-30 Cisco Technology, Inc. Generating accounting data based on access control list entries
US7149862B2 (en) 2002-11-18 2006-12-12 Arm Limited Access control in a data processing apparatus
GB2396034B (en) 2002-11-18 2006-03-08 Advanced Risc Mach Ltd Technique for accessing memory in a data processing apparatus
US7171539B2 (en) 2002-11-18 2007-01-30 Arm Limited Apparatus and method for controlling access to a memory
GB2396930B (en) 2002-11-18 2005-09-07 Advanced Risc Mach Ltd Apparatus and method for managing access to a memory
WO2004046934A2 (en) 2002-11-18 2004-06-03 Arm Limited Secure memory for protecting against malicious programs
US7900017B2 (en) * 2002-12-27 2011-03-01 Intel Corporation Mechanism for remapping post virtual machine memory pages
WO2005017754A1 (en) * 2003-07-29 2005-02-24 Cisco Technology, Inc. Force no-hit indications for cam entries based on policy maps
US20060090034A1 (en) * 2004-10-22 2006-04-27 Fujitsu Limited System and method for providing a way memoization in a processing environment
GB2448523B (en) * 2007-04-19 2009-06-17 Transitive Ltd Apparatus and method for handling exception signals in a computing system
US8799620B2 (en) 2007-06-01 2014-08-05 Intel Corporation Linear to physical address translation with support for page attributes
KR101671494B1 (ko) 2010-10-08 2016-11-02 삼성전자주식회사 공유 가상 메모리를 이용한 멀티 프로세서 및 주소 변환 테이블 생성 방법
FR3065826B1 (fr) * 2017-04-28 2024-03-15 Patrick Pirim Procede et dispositif associe automatises aptes a memoriser, rappeler et, de maniere non volatile des associations de messages versus labels et vice versa, avec un maximum de vraisemblance
KR20200077287A (ko) * 2018-12-20 2020-06-30 에스케이하이닉스 주식회사 메모리 장치, 이를 포함하는 메모리 시스템 및 그것의 동작 방법

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CA784373A (en) * 1963-04-01 1968-04-30 W. Bremer John Content addressed memory system
GB1281387A (en) * 1969-11-22 1972-07-12 Ibm Associative store
US3761902A (en) * 1971-12-30 1973-09-25 Ibm Functional memory using multi-state associative cells
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US4376297A (en) * 1978-04-10 1983-03-08 Signetics Corporation Virtual memory addressing device
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US4442482A (en) * 1982-09-30 1984-04-10 Venus Scientific Inc. Dual output H.V. rectifier power supply driven by common transformer winding
US4638426A (en) * 1982-12-30 1987-01-20 International Business Machines Corporation Virtual memory address translation mechanism with controlled data persistence

Also Published As

Publication number Publication date
GB8612679D0 (en) 1986-07-02
GB2176920B (en) 1989-11-22
KR870003427A (ko) 1987-04-17
JPH0622000B2 (ja) 1994-03-23
CN85106711A (zh) 1987-02-04
HK53590A (en) 1990-07-27
SG34090G (en) 1990-08-03
GB2176918A (en) 1987-01-07
GB8519991D0 (en) 1985-09-18
JPS61286946A (ja) 1986-12-17
DE3618163A1 (de) 1986-12-18
FR2583540A1 (fr) 1986-12-19
GB2176920A (en) 1987-01-07
FR2583540B1 (fr) 1991-09-06
CN1008839B (zh) 1990-07-18
GB2176918B (en) 1989-11-01
DE3618163C2 (de) 1995-04-27

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