KR900002629B1 - Apparatus and method for reading switch settings in micom - Google Patents

Abstract

The circuit for reading the switch setting value with 3 I/O port pins comprises a number of switches (S1-24) selecting the system mode, a microprocessor (100) reading the switch setting value one bit by one bit sequentially by generating the load and shift signals, and registers (201-203) connected in parallel. The registers are transfered to the shift mode after loading the switch setting value with the load and shift signals. The loaded value is shifted one bit by one bit and provided to the microprocessor one by one.

Description

Apparatus and method for reading switch settings from Micom

1 is a system diagram according to the present invention.

2 is a flow chart of the present invention.

* Explanation of symbols for main parts of the drawings

100: microcomputer 201-203: register circuit

SW1-SW24: Switch R1-R24: Resistance

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer or printer system using a microcomputer, and more particularly, to an apparatus and method for reading setting values of switches for selecting an operation mode of a system.

In general, when designing a computer or a printer device, a switch is used for all selections in the mode in which the system operates or in the operation of various option devices. At this time, if the operator sets the desired mode switch, the computer or printer system reads the setting value of the switch and uses the software corresponding to the mode to operate the system.

However, a system using a conventional microcomputer uses a parallel interface I / O chip to read a switch's setting value directly by using a parallel interface I / O chip, and allocates a portion of an input / output port and a memory address section. There is a method of reading according to the decoding method, but the method of reading the switch setting value as described above does not need to read again until the power-off time when it is read once at power-on time. Using expensive I / O chips, the direct readout of I / O terminals and switches in a one-to-one correspondence can cause cost increases and waste of resources and address decoding. There is a problem that becomes a constraint on the map design.

Accordingly, an object of the present invention is to provide an apparatus and method for reading a setting value of a switch using three input / output port pins of an input / output port of a microcomputer.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a system diagram according to the invention, 100 is a microcomputer, 201-203 is a register circuit, SW1-SW24 is a switch, R1-R24 is a resistor, a plurality of switches (SW1-SW24) for selecting an operation mode, The microcomputer 100 generates a clock pulse, a rod and a shift signal for controlling the system, and sequentially reads the setting values of the switches SW1 to SW24 one by one, and the rod and shift signals. Shift mode after inputting clock pulses into the clock and output terminals of the parallel output terminals and the shift terminals, and loading the set values of the switches (SW1-SW24) respectively connected to the plurality of parallel input terminals by the rod and shift signals. By shifting the clock pulse by one bit, the setting value of the switch is composed of a plurality of cascaded first to third register circuits 201 to 203 which are output to the microcomputer 100.

FIG. 2 is a flow chart of the present invention, which generates the load and shift signals in the microcomputer 100 and stores the setting values of the plurality of switches SW1-SW24 in the plurality of bits of the first to third registers 201 to 203, respectively. In the first step, the microcomputer 100 generates a shift signal again to switch the first-third register circuits 201-203 to the shift mode, and at the same time counts the counts of the counts in the microcomputer 100. A second step of counting the same number of switches SW1-SW24, and causing the microcomputer 100 to generate clock pulses of the plurality of switches SW1-SW24 stored in the first to third resist circuits 201-203. Shifting the setting value by 1 bit to read 1 bit of data sequentially and subtracting the counter coefficient by "1" every time 1 bit of data is read, so it repeats until the counter count reaches "0". Setting value of (SW1-SW24) And a fourth step of terminating the read operation when the count of the counter is " 0 " during the third step.

Accordingly, the present invention will be described in detail with reference to the first and second drawings. First, it is noted that the microcomputer 100 of the system of the present invention has an input / output parallel interface circuit and an input / output port.

If the first operator selects the predetermined switch SW1 among the plurality of switches SW1-SW24, the predetermined switch SW1 is turned on to supply the first power VCC supplied through the resistor R1 to the second power supply. The first power source VCC supplied to the line 4 through the resistor R1 is maintained in the low state on the line 4 in conduction with the power source GND. ) And the second power supply GND are short-circuited to generate a high state on the line 4 to perform all operations.

The other switches SW2-SW24 operate as the switches SW1.

When the operator inputs all the operations by selecting any one of the switches SW1-SW24 operating as described above, the microcomputer 100 generates a raw signal on the line 1 through the output terminal P1. Output The first to third register circuits 201 to 203 for inputting the low signal on the line 1 to the low and shift terminals are respectively connected to a plurality of parallel input terminals PD0 to PD23 by the low signal. The setting values of the plurality of switches SW1-SW24 are stored by loading each of the plurality of internal bits.

At this time, the microcomputer 100 again generates and outputs a shift signal on the line 1 through the output terminal P1 and counts the count of the counter within the same number as the switches SW1-SW24. The first to third resist circuits 201 to 203 for inputting the shift signal on the line 1 to the rod and the shift terminal switch to the shift mode.

As described above, the counter count is equal to the number of switches SW1-SW24 and the first to third register circuits 201-203 are shifted, and then the microcomputer 100 outputs a clock pulse through the output terminal P2. Generated output on the line (2).

Then, the first to third register circuits 201 to 203 for inputting the clock pulse on the line 2 to the clock terminal shift the setting values of the switches SW1 to SW24 stored in the plurality of bits bit by bit to form a third register. The circuit 203 outputs the setting value of the switch SW17 through the serial output terminal, and the second register circuit 202 inputs the setting value of the switch SW17 to the serial input terminal and simultaneously Outputs the setting value through the serial output terminal, and the first register circuit 201 also inputs the setting value of the switch SW9 to the serial labor terminal and simultaneously sets the setting value of the switch SW1 through the serial output terminal. (3) Print it out.

The microcomputer 100 which inputs the setting value of the switch SW1 on the line 3 to the input terminal P0 reads the setting value of the switch SW1, stores the setting value of the switch SW1 in its own buffer, and stores the counter coefficient. Subtract by "1" and output clock pulse on the line 2 through the output terminal P2 until the counter count becomes "0", and sequentially set the values of the switches SW2-SW24 by one bit sequentially. Read and store in buffer.

When the counter count is 0, the microcomputer 100 stops the generation of the clock pulse to end the read operation.

Accordingly, the present invention provides an advantage of efficient use and design of the I / O port by reading the setting values of the plurality of switches SW1-SW24 using only three pins of the I / O port, and also provides an address space in the memory. Since there is no allocation, there is an advantage that the utilization area of the address space can be expanded.

Claims (2)

A device for reading switch settings using a microcomputer (100) of a computer system or a printer system, comprising: a plurality of switches (SW1-SW24) for selecting an operation mode of the system, clock pulses and a row for controlling the system A microcomputer 100 which sequentially generates the load and shift signals and sequentially reads the setting values of the switches SW1 to SW24 by 1 bit, and inputs the rod and shift signals and a clock pulse sequence to the rod and Setting values of the switches SW1-SW24 by shifting the setting values of the plurality of switches SW1-SW24 by the shift signal and then shifting to the shift mode and shifting the set values loaded by the clock pulse sequence by one bit. Circuit comprising a plurality of cascaded first to third register circuits (210-203) for outputting one to the microcomputer (100) one by one. A plurality of switches (SW1-SW24) for selecting an operation mode, and a microcomputer for generating clock pulses, load and shift signals to read the setting values of the plurality of switches (SW1-SW24) to control the system ( 100 and a plurality of first to third register circuits 201 to 203 for storing the setting values of the plurality of switches SW1 to SW24 and shifting the output bit by bit according to the low and shift signals and the clock signal. In a method of reading a switch setting of a computer system or a printer system, the microcomputer 100 generates a low signal to cause the first to third register circuits 210 to 203 to generate a plurality of switches (SW1-SW24). In the first step of storing the setting value of each of the plurality of bits, the microcomputer 100 generates a shift signal again to switch the first to third register circuits 201-203 to the shift mode, and County The second step of counting the same as the number of the plurality of switches (SW1-SW24), and the microcomputer 100 generates a shift signal to a plurality of bits of each of the plurality of 1-3 register circuits (201-203) By shifting the setting values of the plurality of switches (SW1-SW24) stored by 1 bit and reading them sequentially one bit at a time, they are stored in the beeper and the counter count is decremented by "1". And a fourth step of repeating the above process until the step is completed, and a fourth step of terminating the read operation of the setting values of the switches SW1-SW24 when the counter count becomes "0" in the third step. How to.

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