KR890007167A - Apparatus and method for reading switching settings from the microcomputer - Google Patents

Apparatus and method for reading switching settings from the microcomputer Download PDF

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Publication number
KR890007167A
KR890007167A KR870011395A KR870011395A KR890007167A KR 890007167 A KR890007167 A KR 890007167A KR 870011395 A KR870011395 A KR 870011395A KR 870011395 A KR870011395 A KR 870011395A KR 890007167 A KR890007167 A KR 890007167A
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South Korea
Prior art keywords
switches
microcomputer
setting values
shift
bit
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KR870011395A
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Korean (ko)
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KR900002629B1 (en
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김광석
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안시환
삼성전자 주식회사
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Priority to KR1019870011395A priority Critical patent/KR900002629B1/en
Publication of KR890007167A publication Critical patent/KR890007167A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Accessory Devices And Overall Control Thereof (AREA)

Abstract

내용 없음No content

Description

마이콤에서 스위치 세팅을 읽어들이는 장치 및 방법Apparatus and method for reading switch settings from Micom

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 본 발명에 따른 시스템도.1 is a system diagram according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

100 : 마이크로컴퓨터 201-203 : 레지스터회로100: microcomputer 201-203: register circuit

SW1-SW24 : 스위치 R1-R24 : 저항SW1-SW24: Switch R1-R24: Resistance

Claims (2)

컴퓨터시스템이나 프린터시스템의 마이크로컴퓨터(100)를 이용한 스위치 세팅을 읽어들이는 장치에 있어서, 시스템의 작동모드를 선택하기 위한 다수의 스위치(SW1-SW24)와, 시스템을 제어하기 위한 클럭펄스와 로오드 및 쉬프트신호를 각각 발생하여 상기 스위치(SW1-SW24)들의 세팅값을 1비트씩 순차적으로 읽어들이는 마이크로컴퓨터(100)와, 상기 로오드 및 쉬프트신호와 클럭펄스열을 입력하여 상기 로오드 및 쉬프트신호에 의해 상기다수의 스위치(SW1-SW24)의 세팅값을 로도드한후 쉬프트모드로 전환하고 상기 클럭펄스열에 의해 로오드된 세팅값을 한비트씩 쉬프트하므로서 스위치(SW1-SW24)의 세팅값을 1개씩 마이크로컴퓨터(100)로 출력하는 종속접속된 다수의 제 1-3 레지스터회로(210-203)로 구성됨을 특징으로 하는 회로.A device for reading switch settings using a microcomputer (100) of a computer system or a printer system, comprising: a plurality of switches (SW1-SW24) for selecting an operation mode of the system, clock pulses and a row for controlling the system A microcomputer 100 which sequentially generates the load and shift signals and sequentially reads the setting values of the switches SW1 to SW24 by 1 bit, and inputs the rod and shift signals and a clock pulse sequence to the rod and Setting values of the switches SW1-SW24 by shifting the setting values of the plurality of switches SW1-SW24 by the shift signal and then shifting to the shift mode and shifting the set values loaded by the clock pulse sequence by one bit. Circuit comprising a plurality of cascaded first to third register circuits (210-203) for outputting one to the microcomputer (100) one by one. 작동모드를 선택하기 위한 다수의 스위치(SW1-SW24)와, 시스템을 제어하기위해 클럭펄스와 로오드 및 쉬프트신호를 발생하여 상기 다수스위치(SW1-SW24)의 세팅값을 읽어들이는 마이크로컴퓨터(100)와, 상기 로오드 및 쉬프트신호와 클럭신호에 의해 상기 다수스위치(SW1-SW24)의 세팅값을 저장하고 한비트씩 쉬프트하여 출력하는 다수의 제 1-3 레지스터회로(201-203)를 구비한 컴퓨터시스템이나 프린터시스템의 스위치 세팅을 읽어들이는 방법에 있어서, 상기 마이크로컴퓨터(100)에서 로오드신호를 발생하여 제 1-3 레지스터회로(210-203)으로 하여금 다수의 스위치(SW1-SW24)의 세팅값을 다수의 각 비트별로 저장하는 제 1 단계와, 상기 마이크로컴퓨터(100)는 다시 쉬프트신호를 발생하여 제 1-3 레지스터회로(201-203)들을 쉬프트모드로 전환시킴과 동시에 자체내의 카운터를 다수의 스위치(SW1-SW24)의 수량과 같게 계수하는 제 2 단계과, 상기 마이크로콤퓨터(100)가 쉬프트 신호를 발생하여 다수의 제1-3레지스터회로(201-203)의 다수의 각비트에 저장된 다수의 스위치(SW1-SW24)의 세팅 값을 1비트만큼 쉬프트시켜 1비트씩 순차적으로 읽어들여 자체내의 비퍼에 저장함과 동시에 카운터의 계수를 "1"씩 감산하여 카운팅의 계수가 "0"이 될때까지 상기과정을 반복하는 제 3 단계와, 상기 제 3 단계에서 카운터의 계수가 "0"로 될때 상기 스위치(SW1-SW24)들의 세팅값을 리드동작을 종료하는 제 4 단계로 구성됨을 특징으로 하는 방법.A plurality of switches (SW1-SW24) for selecting an operation mode, and a microcomputer for generating clock pulses, load and shift signals to read the setting values of the plurality of switches (SW1-SW24) to control the system ( 100 and a plurality of first to third register circuits 201 to 203 for storing the setting values of the plurality of switches SW1 to SW24 and shifting the output bit by bit according to the low and shift signals and the clock signal. In a method of reading a switch setting of a computer system or a printer system, the microcomputer 100 generates a low signal to cause the first to third register circuits 210 to 203 to generate a plurality of switches (SW1-SW24). In the first step of storing the setting value of each of the plurality of bits, the microcomputer 100 generates a shift signal again to switch the first to third register circuits 201-203 to the shift mode, and County The second step of counting the same as the number of the plurality of switches (SW1-SW24), and the microcomputer 100 generates a shift signal to a plurality of bits of each of the plurality of 1-3 register circuits (201-203) By shifting the setting values of the plurality of switches (SW1-SW24) stored by 1 bit and reading them sequentially one bit at a time, they are stored in the beeper and the counter count is decremented by "1". And a fourth step of repeating the above process until the step is completed, and a fourth step of terminating the read operation of the setting values of the switches SW1-SW24 when the counter count becomes "0" in the third step. How to. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870011395A 1987-10-14 1987-10-14 Apparatus and method for reading switch settings in micom KR900002629B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870011395A KR900002629B1 (en) 1987-10-14 1987-10-14 Apparatus and method for reading switch settings in micom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870011395A KR900002629B1 (en) 1987-10-14 1987-10-14 Apparatus and method for reading switch settings in micom

Publications (2)

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KR890007167A true KR890007167A (en) 1989-06-19
KR900002629B1 KR900002629B1 (en) 1990-04-21

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