KR890017813A - Transistor manufacturing method - Google Patents

Transistor manufacturing method Download PDF

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Publication number
KR890017813A
KR890017813A KR1019880006397A KR880006397A KR890017813A KR 890017813 A KR890017813 A KR 890017813A KR 1019880006397 A KR1019880006397 A KR 1019880006397A KR 880006397 A KR880006397 A KR 880006397A KR 890017813 A KR890017813 A KR 890017813A
Authority
KR
South Korea
Prior art keywords
layer
transistor manufacturing
epitaxial layer
diffusing
emitter
Prior art date
Application number
KR1019880006397A
Other languages
Korean (ko)
Other versions
KR960012580B1 (en
Inventor
김영한
Original Assignee
최근선
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 최근선, 주식회사 금성사 filed Critical 최근선
Priority to KR88006397A priority Critical patent/KR960012580B1/en
Publication of KR890017813A publication Critical patent/KR890017813A/en
Application granted granted Critical
Publication of KR960012580B1 publication Critical patent/KR960012580B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804—Emitter regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음No content

Description

트랜지스터 제조 방법Transistor manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도느 가-다는 본 발명 방법의 공정을 설명하기 위한 공정도, 제 2 도는 본 발명 방법에 의한 트랜지스터의 구조 특성도.1 is a process chart for explaining the process of the method of the present invention, and FIG. 2 is a structural characteristic diagram of a transistor according to the method of the present invention.

Claims (1)

제 1 도 가와같이 n+매입층을 확산하여 그위에 농도가 낮은 에피렉셜층(2)을 성장시키고 베이스층을 확산하여 베이스층에 에미터를 확산하는 표준 바이폴러 IC제조 방법에 있어서, 베이층(3)과 에피텍셜층(2)에 결쳐서 2차 에피텍셜층(5)을 형성한후 2차에피텍셜층(5)을 제거하여 잔이 베이스층(3)에 에미터(4)를 확산하여된 트랜지스터 제조 방법.As shown in Fig. 1, in the standard bipolar IC manufacturing method of diffusing an n + buried layer to grow an epitaxial layer 2 having a low concentration thereon, and diffusing a base layer to diffuse an emitter in the base layer, 3) and the epitaxial layer (2) to form a secondary epitaxial layer (5) and then remove the secondary epitaxial layer (5), the glass diffuses the emitter (4) in the base layer (3) Transistor manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR88006397A 1988-05-31 1988-05-31 Transistor & method of manufacturing the same KR960012580B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR88006397A KR960012580B1 (en) 1988-05-31 1988-05-31 Transistor & method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR88006397A KR960012580B1 (en) 1988-05-31 1988-05-31 Transistor & method of manufacturing the same

Publications (2)

Publication Number Publication Date
KR890017813A true KR890017813A (en) 1989-12-18
KR960012580B1 KR960012580B1 (en) 1996-09-23

Family

ID=19274778

Family Applications (1)

Application Number Title Priority Date Filing Date
KR88006397A KR960012580B1 (en) 1988-05-31 1988-05-31 Transistor & method of manufacturing the same

Country Status (1)

Country Link
KR (1) KR960012580B1 (en)

Also Published As

Publication number Publication date
KR960012580B1 (en) 1996-09-23

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