KR890007565A - Synchronous Protection Circuit of Video System - Google Patents

Synchronous Protection Circuit of Video System Download PDF

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Publication number
KR890007565A
KR890007565A KR870011979A KR870011979A KR890007565A KR 890007565 A KR890007565 A KR 890007565A KR 870011979 A KR870011979 A KR 870011979A KR 870011979 A KR870011979 A KR 870011979A KR 890007565 A KR890007565 A KR 890007565A
Authority
KR
South Korea
Prior art keywords
synchronous
video system
protection circuit
synchronous protection
gate
Prior art date
Application number
KR870011979A
Other languages
Korean (ko)
Other versions
KR900007907B1 (en
Inventor
최훈순
Original Assignee
안시환
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 안시환, 삼성전자 주식회사 filed Critical 안시환
Priority to KR1019870011979A priority Critical patent/KR900007907B1/en
Publication of KR890007565A publication Critical patent/KR890007565A/en
Application granted granted Critical
Publication of KR900007907B1 publication Critical patent/KR900007907B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/05—Synchronising circuits with arrangements for extending range of synchronisation, e.g. by using switching between several time constants

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

내용 없음No content

Description

비데오 시스템의 동기 보호회로Synchronous Protection Circuit of Video System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

본 발명의 회로도.Circuit diagram of the present invention.

Claims (1)

동기분리 소자(I)의 출력 및 동기검출 카운터(2)의 분주된 출력으로 실제 수평동기 신호가 검출되게 동기 분리소자(I) 및 동기검출 카운터(2)에 게이트를 연결시키고 최종 검출된 동기 신호는 동기 발생 카운터(3)를 리셋트시켜 동기 시작점이 잡히도록 동기발생 카운터(3)의 궤환 출력측에 낸드 게이트(N2) 및 앤드 게이트(A1)를 연결 시켜 된 비데오 시스템의 동기 분리회로.A gate is connected to the synchronous separation element I and the synchronous detection counter 2 so that an actual horizontal synchronous signal is detected by the output of the synchronous separation element I and the divided output of the synchronous detection counter 2, and finally the detected synchronous signal. Is a synchronous separation circuit of a video system in which a NAND gate (N 2 ) and an end gate (A 1 ) are connected to the feedback output side of the synchronization generation counter (3) so as to reset the synchronization generation counter (3). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870011979A 1987-10-28 1987-10-28 Synchronizing protecting circuit for video system KR900007907B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870011979A KR900007907B1 (en) 1987-10-28 1987-10-28 Synchronizing protecting circuit for video system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870011979A KR900007907B1 (en) 1987-10-28 1987-10-28 Synchronizing protecting circuit for video system

Publications (2)

Publication Number Publication Date
KR890007565A true KR890007565A (en) 1989-06-20
KR900007907B1 KR900007907B1 (en) 1990-10-22

Family

ID=19265523

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870011979A KR900007907B1 (en) 1987-10-28 1987-10-28 Synchronizing protecting circuit for video system

Country Status (1)

Country Link
KR (1) KR900007907B1 (en)

Also Published As

Publication number Publication date
KR900007907B1 (en) 1990-10-22

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