KR870001797Y1 - Character size control circuit in crt monitor - Google Patents

Abstract

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Description

Character size enlarger of cathode ray tube terminal

1 is a circuit diagram of the device of the present invention.

2 is a circuit diagram of a scanning line signal controller of the present invention device.

3A is a circuit diagram of a character ROM output data control unit of the present invention device.

FIG. 3B is a circuit diagram of a shift rod control signal generator of the serialization circuit. FIG. 3C is a clock signal waveform diagram of FIG. 3A.

Figure 4a is a form of the characters displayed on the drunk screen.

4B is an address diagram of a ROM in which the characters of FIG. 4A are stored.

5A and 5B show one embodiment of the characters displayed by the present table. Table 1 shows the truth table of logic by the circuit of FIG.

The present invention relates to a device for expanding the size of a character displayed on the screen in a cathode ray tube terminal of a computer twice, in particular, by connecting a scanning line control circuit between the character ROM and the cathode ray tube controller, the height of the character is increased. Of a character size enlargement device of a cathode ray tube terminal connected to a ROM data control circuit between a character ROM and a serialization circuit to enlarge the width of the characters but display different characters on the same line of the screen. It is about.

In the conventional cathode ray tube terminal, the character size enlargement device cannot change the size of a character displayed on one line on the screen once and display only the same size, so that large and small characters cannot be displayed on the same line. There was inconvenience.

In view of the above, the present invention is to control input and output signals of a character ROM using a scan line signal control circuit and a ROM data control circuit, so that large and small characters can be arbitrarily selected and displayed on the same line.

As shown in Figs. 1, 2 and 3, the device of the present invention has the address output AOUT of the cathode ray tube controller 1 inputted to the address input AIN of the screen RAM 2 to output its data. (DOUT) are the upper address input is input to the (C ₃ -C _7), the scanning line signal control unit 4 connected between the eumgok ray tube controller (1) and the character ROM (3) for the ROM (3) for character eumgok The output L ₀ -L ₂ of the tube controller 1 is controlled by the selector 103 and inputted to the lower address input C ₀ -C ₃ of the character ROM 3 so that the height of the character is doubled. In addition, the ROM data control unit 6 connected between the character ROM 3 and the serialization circuit 5 generates a data output (D) of the character ROM 3. -D ₇ ) is controlled by the selector 601 to be input (G) to the serialization circuit 5 so that the width of the character is doubled, and the output F of the ROM data controller 6 -F ₇ ) is inputted to the input G of the serialization circuit 5.

Effects of the present invention are as follows.

The method of displaying a character on the screen of a monitor using raster scanning is as shown in Fig. 1 according to the position of the character to be displayed on the address (address) of the character RAM 2 corresponding to the position. If the corresponding character code is stored, during one cycle of the character clock CLK, the sound curve tube controller 1 sends out the address where the character code to be displayed is stored to the output AOUT.

This output AOUT enters the address input AIN of the screen RAM 2 and the screen RAM 2 sends the character code to the output DOUT.

This character code output goes to the upper address input (C _3- C ₇ ) of the ROM (3) containing the character forms and is also increased one by one as the scanning line signal address performs horizontal scanning. Come out to the address output (L _0- L ₂ ) and lower address (C) of ROM (3) -C ₂ ) outputs a line of dots (dots) in the form of stored characters in the ROM 3. DD ₇ ).

This output is stored in the shift registers 501 and 502 of the serialization circuit 5, and shifted one by one in the dot clock CLK unit so that the screen dots are serially inputted into the video signal input of the monitor through external logic and processed on the screen.

The present invention provides a lower address input (C) of the character ROM 3 of FIG. 1 to enlarge and display one character form twice (see FIG. 25). -C ₂ ) using the scan line signal control unit 4 for controlling the negative curve and the scan line address (L ₂ -L) while performing horizontal scanning in the controller 1 ). In the scanning line control section 4, the scanning line addresses L ₀ -L ₂ are inputted, and the lower address C ₀ -C ₃ of the ROM ₃ is designated as the output B ₀ -B ₂ . The configuration of (4) is shown in FIG.

In FIG. 2, the H / L signal is the most significant bit (MSB) of the information (character code) contained in the screen RAM 2, and in FIG. 4 (a) and 4 (b), b and b +1 are shown. With a value of 1, a and a +1 have a value of 0 to determine the top and bottom of the character type.

In Fig. 2, the signals A ₀ -A ₂ are the scan line address outputs L in the curve controller 1. -L ₂ ) and has a value from 0 to 7, and the value is increased by “1” each time the horizontal synchronization signal occurs. (The value of “0” followed by “7”)

3-8 decoder 401 receives inputs (A ₀ -A ₂ ) and generates outputs (H ₆ -H ₇ ), so outputs (H ₀ -H ₇ ) are input to OR gates (404-407). It is input to two encoders 402.

Therefore, the scan line address, the input / output of the 3-8 decoder 401 and the input / output of the 4-2 encoder 402 are as shown in the following table.

When the size of the text is enlarged by twice the width and height as shown in Fig. 5, the scanning line control circuit is a part related to the expansion of the height. Fig. 1 shows a map of RAM 2 different from that of Fig. 1, in which the characters of Fig. 4A are stored.

The most significant bit (MSB) stores the values of the H / L signals representing the upper (0) and lower (1) subfactors when the character type is divided into two upper and lower parts to double the height of the character. The H / L signal is output on the second diagram (A ₂ )

If the box of characters consists of eight scan lines, the scan line addresses are incremented by one from 0 to 7, while performing the horizontal scan. Using the circuit of FIG. 2, the scan line addresses are increased by one after scanning the two scan lines. (See truth table in table 1.)

A selection (SEL) signal indicates a normal size of 0 and a magnification of 2 times. That is, when the signal SEL is “1”, the output B ₀ -B ₂ of the selector 403 is input (A _0). -A ₂ Such as) (K ₀ -K ₂ ), And the signal SEL is "0", the output B ₀ -B ₂ is selected as the input (K ₀ -K ₂ ) same as the input A ₀ -A ₂ . The signal SEL is set to "1" to display on the screen that the character size is enlarged twice, and the cathode ray tube controller 1 outputs to the RAM 2 of FIG. 1 for the character to be displayed on the screen. The output DOUT of the RAM 2 designates the upper address C ₃ -C _{7 of the} ROM 3 while the lower address C ₀ -C ₂ of the ROM 3 is a scan line signal controller. It is designated as the output of the selector 403 of (4), but the output of the selector 403 is the output (A ₀ ) of the 4-2 encoder 402. -A ₂ Since the upper part of the character form has a value of 0 to 3, and the lower part has a value of 4 to 7, the value increases by one each time the horizontal scan is doubled (ie whenever the horizontal synchronous signal is doubled). Therefore, the height of the letter is enlarged. Since the cathode ray tube controller 1 designates the address of the screen RAM 2 in units of the character clock CCLK, the same character code is stored in succession twice for the enlarged display. (Fig. 4 (b)) Once the address of the ROM 3 in character form is determined, in the ROM 3, one scan line form in the character form comes out to the data output D ₀ -D ₇ . The logic circuit of 3 degrees is used.

That is, in the third (b), the counter 606 increases the coefficient of the output X whenever the dot clock DCLK occurs, and the combinational logic circuit 607 inputs the output X of the counter 606 ( Y) has outputs 8C and 16C that generate one clock when 8 and 16 dot clocks DCLK are generated by combining the count values. The data outputs D ₀ -D ₇ of the ROM 3 are also input (E ₀ -E ₃ and E ₀ ) of the selector 601 of FIG. 3 (a) _. -E ₇ ) And the input (C ₀ -C ₇ ) of the shift register 501. When the character is enlarged, the signal SEL becomes "1", so the output of the AND gate 603 becomes "0", and the output of the AND gate 4606, that is, the output 16C of the combined logic circuit 607, is parallel-. Inputs of the parallel-serial shift registers 501,502 when applied to the inputs S / L of the serial shift registers 501 and 502 and the dot clock DCLK is counted 16 times in the counter 606 (C ₇ -C ₀ , C). ₇ -C ₀ ), So that the character form enlarged twice the width is dot. That is, the inputs of the parallel-serial shift registers 501 and 502 (C ₇ -C ₀ , C _7). -C ₀ ), One bit of the data output D (-D ₇ ) of the ROM 3 occupies two bits, so the character width is doubled.

For example, since the data output D ₄ is simultaneously applied to the inputs C ₀ and C ₁ of the shift register 501, one dot is enlarged to a double dot. Therefore, the character form with the width of 8 dots becomes the character form with the width of 16 dots. In FIG. 3, when the select (SEL) signal is 1, the input of the selector 601 (E _0). -E ₇ ) Is selected and the 16 count signal 16C acts as the control input (S / L) of the two shift registers 501 and 502, so that the individual dot shapes are doubled.

The image dot in the unit of the clock for the dot (DCLK) comes out to the output (OUT) of the serialization circuit (5) and enters the video input to the monitor through an external logic circuit, and the height and width are doubled as shown in Fig. 5 (a). The characters are displayed on the screen.

Therefore, the scanning line signal controller 4 increases the character height by one horizontal scan every two times, i.e., when two horizontal synchronizing signals occur, so that the character height is enlarged, and the ROM data controller 6 outputs the character data output (D _0). The shift registers 501 and 502 generate two dot outputs in one data dot output of -D ₇ ) to enlarge the character width.

In this way, the present invention is to conveniently control the input and output data of the character ROM, so that the size of the individual characters can be selectively enlarged, so that large and small characters can be used in the same line.

TABLE 1

Claims (1)

In controlling the screen RAM and the character ROM with the cathode ray tube controller, the scanning line signal controller 4 connected between the cathode ray tube controller 1 and the character ROM 3 is the output L of the cathode ray tube controller 1. _0- L ₂ ) is controlled by the decoder 401, the encoder 402, and the OR gate 407 selector 403 to be input to the lower address input C ₀ -C _{3 of} the character ROM 3. To increase the height of the doubled, the ROM data control unit 6 connected between the character ROM (3) and the serialization circuit (5) is a data output of the data output (D _0- D ₇ ) of the character ROM (3) (D ₃ -D ₇ ) are connected to the serialization circuit 501 one bit per bit, and the data output (D ₀ -D ₂ ) is connected to the input terminal (E ₀ ) by the selector (601). -E ₇ 2 counters per bit, and the outputs (D ₀ -D ₇ ) are connected to the other inputs (E ₀ -E ₇ ) to control one clock when 16 dots are generated. A character size enlargement device of a cathode ray tube terminal, in which the width of a character is doubled as a serialization circuit (5) by controlling the shift / loading of the serialization circuit (5) with a logic combination circuit (607) and a gate (602-605).