KR850005054A

KR850005054A - Digital Phase Synchronizer of Same Frequency Signal of Signal Demodulator

Info

Publication number: KR850005054A
Application number: KR1019840007802A
Authority: KR
Inventors: 토렐리 귀도 (외 2)
Original assignee: 기우세페조찌, 클라우디오 마기오니; 에스지 에스-에이티이에스 콤포넨티 엘렉뜨로니치 에스. 피. 에이.
Priority date: 1983-12-12
Filing date: 1984-12-10
Publication date: 1985-08-19
Also published as: FR2556527A1; GB2151421B; GB2151421A; IT1212796B; GB8430638D0; JPS60142638A; FR2556527B1; DE3444401A1; DE3444401C2; IT8324109A0

Abstract

내용 없음No content

Description

Digital Phase Synchronizer of Same Frequency Signal of Signal Demodulator

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 위상 동기 장치(phase sychronizer)를 포함하는 신호 복조기(demodulator)를 도시한 계통도,1 is a schematic diagram showing a signal demodulator including a phase sychronizer according to the present invention;

제2도는 상술한 위상 동기 장치를 동작시키는 신호들의 파형을 도시한 그래프도.2 is a graph showing waveforms of signals for operating the above-described phase synchronizer.

Claims

A digital phase synchronizing device of a same frequency signal of a signal demodulator in which one of the same frequency signals is useful by a frequency divider by frequency dividing a digital signal of a multiplier frequency generated by a frequency generator. A predelay / delay circuit inserted between the frequency divider to advance and delay communication instants of digital signals, a phase detector capable of detecting phase errors between the same frequency signals, and the phase error / delay of the phase error; A phase synchronizing device comprising a digital error detector capable of converting a digital control signal for a circuit.

2. The phase synchronizer as set forth in claim 1, wherein said communication instantaneous advance / delay circuit is composed of a transfer logic gate having an open time controlled by said digital control signal.

The phase synchronization device of claim 1, wherein the preceding / delay circuit is formed of a NAND / NOR type logic circuit.

2. The phase synchronizer as claimed in claim 1, wherein the preceding / delay circuit comprises a pulse generator.

2. A phase synchronizer as set forth in claim 1, wherein said phase detector consists of a bit circuit of said same frequency signals.

2. The phase synchronizer as set forth in claim 1, wherein said phase detector is composed of a phase comparator.

2. The phase synchronizer as set forth in claim 1, wherein said frequency generator is comprised of a frequency multiplier receiving a frequency-reducing digital reference signal.

8. The phase synchronizer of claim 7, wherein the reference signal has a frequency lower than a frequency of the same frequency signals.

8. The phase synchronizer of claim 7, wherein the reference signal has a frequency equal to a frequency of the same frequency signals.

8. The phase synchronizer of claim 7, wherein the frequency generator comprises an oscillator to oscillate at a multiplier frequency of the frequencies of the same frequency signals.

※ Note: The disclosure is based on the initial application.