KR20210034265A - Liquid crystal display device and method of fabricating the same - Google Patents

Abstract

According to the present invention, a liquid crystal display device and a manufacturing method thereof, wherein one of the plurality of bumper layers formed on an array substrate and a first column spacer are in contact with each other in a liquid crystal layer. The present invention provides an effect of improving display quality by preventing red eye defects and increasing an aperture ratio and transmittance at the same time, and the present invention uses a half-tone mask or a multi-tone mask to form the bumper layer with a photoresist used when forming a pixel electrode on an array substrate, thereby shortening a process time by reducing the number of masks used during a process.

Description

Liquid crystal display device and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME}

The present invention relates to a liquid crystal display device and a method of manufacturing the same.

Recently, as interest in information display has increased and the demand to use portable information media has increased, it has become a lightweight thin-film flat panel display (FPD) that replaces the existing display device, Cathode Ray Tube (CRT). Research and commercialization of Korea are being focused. In particular, among these flat panel display devices, a liquid crystal display (LCD) is a device that expresses an image by using the optical anisotropy of liquid crystal, and has excellent resolution, color display, and image quality, so it is actively applied to laptops and desktop monitors. have.

A typical liquid crystal display device is largely composed of a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate while maintaining a cell gap by column spacers formed on the color filter substrate.

Meanwhile, in the case of a high-resolution model or a wide model in which the horizontal and vertical size ratio of the liquid crystal panel is 16:9 or more, the column spacer is easily pushed by an external force as the horizontal size ratio increases compared to the vertical size. That is, in the wide model, the horizontal size ratio increases compared to the vertical, so that the left and right tension is weakened, and thus the vertical external force increases, thereby increasing the vertical push of the column spacer.

In general, the column spacers formed on the color filter substrate are in contact with the array substrate, and when an external force is applied, the array substrate slides in various directions and moves back to its original position.

At this time, the moving column spacer damages the alignment layer made of polyimide (PI) on the surface of the array substrate, and the alignment of the liquid crystal is distorted from the original alignment due to the damage of the alignment layer, resulting in unwanted light. Light leakage occurs in this bird.

The light leaking out in this way becomes reddish, greenish, or bluish depending on the formation position of the column spacers in the black image of the liquid crystal panel. red eye) is called bad.

In order to prevent light leakage due to the movement of the column spacer, the width of the black matrix is enlarged based on the formation position of the column spacer in consideration of the movement distance of the column spacer. It acts as the biggest stumbling block, and in particular, it brings a limit to securing the aperture ratio.

An object of the present invention is to solve the above problem, and to provide a liquid crystal display device and a method of manufacturing the same to minimize a phenomenon in which a column spacer is pushed up and down by an external force to prevent a red eye defect.

Another object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, which improves the aperture ratio and transmittance of a liquid crystal panel by reducing the width of a black matrix.

Another object of the present invention is to reduce the number of masks used during the process by forming a bumper layer with a photoresist (PR) used when forming a pixel electrode using a multi-tone mask, thereby reducing the process time. It is to provide a liquid crystal display device that can be shortened and a method of manufacturing the same.

In addition, other objects and features of the present invention will be described in the configuration and claims of the invention to be described later.

In order to achieve the above object, in the liquid crystal display device according to an embodiment of the present invention, a plurality of pixels each having a plurality of sub-pixels are arranged in a matrix form, and are bonded to face each other with a liquid crystal layer interposed therebetween. A first substrate and a second substrate; A black matrix and a color filter disposed under the second substrate; A column spacer having a first column spacer and a second column spacer disposed under a region where the black matrix and the color filter overlap; A pixel electrode disposed on the first substrate; A plurality of bumper layers disposed above the pixel electrodes on the first substrate and spaced apart from the pixel electrodes; A common electrode disposed on the first substrate; And an auxiliary electrode disposed between the common electrode and the bumper layer, made of the same material as the pixel electrode, spaced apart from the pixel electrode, and electrically connected to the common electrode. At least one first bumper layer and the first column spacer contact each other in the liquid crystal layer.

In this case, the liquid crystal display further includes a protective layer disposed between the common electrode and the auxiliary electrode, and the common electrode and the auxiliary electrode may contact each other through a first contact hole formed in the protective layer.

In this case, the liquid crystal display further includes a thin film transistor disposed on the first substrate, and one of the source electrode or the drain electrode of the thin film transistor mutually with the pixel electrode through a second contact hole formed in the protective layer. I can contact you.

In this case, the liquid crystal display further includes a planarization layer disposed between the thin film transistor and the protective layer, and the thickness of the planarization layer may be greater than the thickness of the plurality of bumper layers.

In the liquid crystal display according to the above embodiment, at least one second bumper layer among the plurality of bumper layers may face each other at a predetermined distance from the second column spacer and the liquid crystal layer.

In this case, the thickness of the at least one first bumper layer may be greater than the thickness of the at least one second bumper layer.

In this case, the first column spacer and the second column spacer may have different shapes.

In the liquid crystal display according to the above embodiment, the at least one first bumper layer and the first column spacer may have a cross shape crossing long sides of each other.

In this case, the first column spacer may overlap the second contact hole.

Another liquid crystal display according to an embodiment of the present invention includes a first substrate having a plurality of gate lines and a plurality of data lines; A plurality of pixels disposed on the first substrate, each having a plurality of sub-pixels; And a plurality of bumper layers provided on the plurality of gate lines, wherein the plurality of bumper layers are provided at least one in each of the plurality of pixels, and a first provided in each of the plurality of sub-pixels. It characterized in that it is disposed between the two contact holes.

At this time, at least one of the plurality of sub-pixels may include a thin film transistor disposed on the first substrate and including a gate electrode, a source electrode, and a drain electrode; A pixel electrode disposed on the thin film transistor and electrically connected to the drain electrode; A common electrode disposed on the thin film transistor; And an auxiliary electrode disposed between one of the plurality of bumper layers and the common electrode, made of the same material as the pixel electrode, and electrically connected to the common electrode.

In another liquid crystal display according to the above embodiment, a gap spacer or a pressing spacer is provided on each of the plurality of bumper layers, and the gap spacer may overlap the second contact hole.

At this time, a first bumper layer corresponding to the gap spacer among the plurality of bumper layers abuts the gap spacer, and a second bumper layer corresponding to the pressing spacer among the plurality of bumper layers is spaced apart from the pressing spacer by a predetermined distance. You can face each other.

The gap spacer and the pressed spacer may have the same thickness, and the first bumper layer may have a greater thickness than the second bumper layer.

The gap spacer may have a thickness greater than that of the pressed spacer, and the plurality of bumper layers may have the same thickness.

The first bumper layer and the gap spacer may have a cross shape crossing long sides of each other.

In addition, a method of manufacturing a liquid crystal display device according to an embodiment of the present invention includes forming a thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode on a first substrate; Forming a planarization layer on the thin film transistor; Forming a common electrode on the planarization layer; Forming a protective layer on the planarization layer and the common electrode; Forming a second contact hole through which a portion of the drain electrode is exposed and a first contact hole through which a portion of the common electrode is exposed in the protective layer; Forming a conductive film on the entire surface of the protective layer in which the first and second contact holes are formed; After forming a photoresist on the conductive layer, the conductive layer is patterned to form an auxiliary electrode in contact with the common electrode through the first contact hole, spaced apart from the auxiliary electrode, and the second contact hole. Forming a pixel electrode in contact with the drain electrode; And forming a bumper layer on the auxiliary electrode with the remaining photoresist after patterning the conductive layer.

In this case, the manufacturing method of the liquid crystal display further includes forming an interlayer insulating layer on the thin film transistor before forming the planarization layer, wherein in the step of forming the first contact hole and the second contact hole The first contact hole and the second contact hole may be formed by simultaneously dry etching the interlayer insulating layer and the protective layer.

In this case, forming the pixel electrode may include irradiating UV to the photoresist sheet using a half-tone mask or a multi-tone mask; And forming the pixel electrode and the auxiliary electrode through a photoresist developing process and an etching process.

In this case, the method of manufacturing the liquid crystal display device includes forming a column spacer on a second substrate; And bonding the first substrate and the second substrate while maintaining a cell gap through the column spacer and the bumper layer, wherein the column spacer and the bumper layer may face each other.

As described above, the liquid crystal display device according to an embodiment of the present invention and a method of manufacturing the same are characterized in that one of the plurality of bumper layers formed on the array substrate and the first column spacer contact each other in the liquid crystal layer, so that red eye defects While this is prevented, the aperture ratio and transmittance are increased, thereby providing an effect of improving display quality.

By forming a bumper layer with a photoresist (PR) used when forming a pixel electrode on an array substrate using the multi-tone mask of the present invention, the number of masks used during the process is reduced, thereby reducing the process time. Provides an effect that can be shortened.

1 is a plan view schematically illustrating a second contact hole and a bumper layer of an array substrate, a black matrix of a color filter substrate, and a column spacer in an active area of a liquid crystal display according to an exemplary embodiment of the present invention.
FIG. 2 is a plan view schematically illustrating a part of an array substrate and a column spacer of a color filter substrate of a liquid crystal display according to an exemplary embodiment with respect to area A of the plan view of FIG.
3 is a plan view schematically illustrating a common electrode, a pixel electrode, an auxiliary electrode, and a bumper layer in an active region of a liquid crystal display according to an exemplary embodiment of the present invention.
4 is a cross-sectional view illustrating, for example, a part of a cross section taken along line II′ in the liquid crystal display device according to the exemplary embodiment of the present invention shown in FIG. 2.
5A and 5B are cross-sectional views illustrating a portion of a cross-section taken along line II-II′ in the liquid crystal display device according to the exemplary embodiment illustrated in FIG. 2, showing two examples.
6A to 6K are cross-sectional views sequentially showing a manufacturing process of the array substrate according to the exemplary embodiment of the present invention shown in FIG. 4.
7A to 7D are cross-sectional views sequentially showing a manufacturing process of the color filter substrate according to the embodiment of the present invention shown in FIG. 4.

Hereinafter, preferred embodiments of a liquid crystal display device and a method for manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings so that those of ordinary skill in the art may easily implement the present invention.

Advantages and features of the present invention, and a method of achieving them will become apparent with reference to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, only the present embodiments are intended to complete the disclosure of the present invention, and common knowledge in the technical field to which the present invention pertains. It is provided to completely inform the scope of the invention to those who have, and the invention is only defined by the scope of the claims. The same reference numerals refer to the same elements throughout the specification. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity of description.

When an element or layer is another element or referred to as “on” or “on”, it includes not only directly above the other element or layer, but also a case in which another layer or other element is interposed in the middle. do. On the other hand, when a device is referred to as "directly on" or "directly on", it indicates that no other device or layer is interposed therebetween.

The terms "below, beneath", "lower", "above", and "upper", which are spatially relative terms, refer to one element or component as shown in the drawing. It can be used to easily describe the correlation between the and other devices or components. Spatially relative terms should be understood as terms including different directions of the device during use or operation in addition to the directions shown in the drawings. For example, if an element shown in the figure is turned over, an element described as “below” or “beneath” another element may be placed “above” another element. Accordingly, the exemplary term “below” may include both directions below and above.

The terms used in the present specification are for describing exemplary embodiments, and therefore, are not intended to limit the present invention. In this specification, the singular form also includes the plural form unless specifically stated in the phrase. As used in the specification, "comprise" and/or "comprising" refers to the presence of one or more other components, steps, actions and/or elements in which the recited component, step, operation and/or element Or does not preclude additions.

1 and 2 are plan views schematically showing a part of a liquid crystal display according to an embodiment of the present invention. In FIG. 1, a black matrix 106 and a plurality of bumpers disposed between sub-pixels forming a matrix arrangement Layer 140 and column spacers 130a and 130b are shown. 1 and 2, the thin film transistor and the second contact hole 120 provided for each sub-pixel of the array substrate may overlap the black matrix 106.

In FIG. 2, a fringe-field switching (FFS) type liquid crystal in which a fringe field formed between the pixel electrode and the common electrode penetrates the slit to drive liquid crystal molecules positioned on the pixel region and the common electrode to realize an image. A part of the array substrate of the display device is schematically shown. However, the present invention is not limited thereto, and is applied not only to the FFS method but also to an IPS type liquid crystal display device using a transverse electric field.

In a liquid crystal display, there are MxN sub-pixels as N gate lines and M data lines cross each other, but for simplicity, in FIG. 2, red, green, and blue sub-pixels are provided in some areas A of FIG. Pixels that are composed of pixels R, G, and B to form one pixel are shown, for example.

As shown in FIG. 2, when the pixel electrode including the slit has a bent structure, the liquid crystal molecules are arranged in two directions to form a 2-domain, so that the viewing angle is further improved compared to the mono-domain. However, the present invention is not limited to the liquid crystal display device having a 2-domain structure, and the present invention is applicable to a liquid crystal display device having a multi-domain structure of not only a mono-domain structure but also a 2-domain or more. .

3 schematically shows a common electrode 108, a pixel electrode 118, an auxiliary electrode 119, and a bumper layer 140 in an active region in a liquid crystal display according to an exemplary embodiment of the present invention. As shown in FIG. 3, the common electrode 108 may be formed in the entire active region except for a location where the second contact hole 120 is to be formed. The auxiliary electrode 119 is formed of the same material on the same layer as the pixel electrode 118 and is separated from the pixel electrode 118 and formed between the second contact hole 120 on which the common electrode 108 is not formed. It is electrically connected to the common electrode 108. The bumper layer 140 is formed on the area where the auxiliary electrode 119 is formed, and the lower surface area of the bumper layer 140 may be smaller than the upper surface area of the auxiliary electrode 119.

FIG. 4 is a cross-sectional view taken along line II' in the liquid crystal display device according to an embodiment of the present invention shown in FIG. 2, and FIGS. 5A and 5B are cross-sections taken along line II-II'. As an example, a part of a cross section of a liquid crystal panel in which a color filter substrate and an array substrate are bonded is schematically shown.

Referring to the drawings, in the array substrate 110 according to an embodiment of the present invention, a gate line 116 and a data line 117 are formed vertically and horizontally on the transparent array substrate 110 to define a pixel region. Has been. In addition, a thin film transistor, which is a switching element, is formed in an intersection region between the gate line 116 and the data line 117, and a common electrode 108 and a plurality of slits 118s are formed in the pixel region to drive liquid crystal molecules. A pixel electrode 118 having) is formed.

The thin film transistor is electrically connected to the pixel electrode 118 through a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a second contact hole 120. It consists of the connected drain electrode 123. In addition, the thin film transistor includes a gate insulating layer 115a for insulation between the gate electrode 121 and the source/drain electrodes 122 and 123, and the source electrode ( It includes an active layer 124 forming a conductive channel between the drain electrode 122 and the drain electrode 123.

In this case, when an amorphous silicon thin film is used as the active layer 124, the source/drain regions of the active layer 124 are formed with the source/drain electrodes 122 and 123 through an ohmic-contact layer (not shown). To form a contact. However, the present invention is not limited thereto, and a polysilicon thin film or an oxide semiconductor may be used as the active layer 124.

As described above, the common electrode 108 and the pixel electrode 118 are formed in the pixel region to generate a fringe field. In this case, the common electrode 108 includes an interlayer insulating layer 115b and a planarization layer 115c. ), and is formed in a single pattern over the entire pixel portion except for the second contact hole 120, and the pixel electrode 118 is formed in a box shape in each pixel area, and is formed on the protective layer 115d. It may be formed to have a plurality of slits (118s). However, the present invention is not limited thereto, and the common electrode 108 may be formed to have a plurality of slits instead of the pixel electrode 118.

In this case, the common electrode 108 may be electrically connected to the common line 108L arranged parallel to the gate line 116 through a third contact hole (not shown).

As shown in FIG. 2, a plurality of bumper layers 140 formed on the array substrate 110 may be randomly disposed on a thin film transistor provided for each sub-pixel constituting a matrix arrangement. Alternatively, they may be randomly disposed between the second contact holes 120 each provided for each sub-pixel.

The array substrate 110 configured as described above is bonded to the color filter substrate 105 while maintaining the cell gap through the column spacers 130a and 130b to form a liquid crystal panel. At this time, the color filter substrate 105 The color filter 107 composed of red, green, and blue sub-color filters that implement red, green, and blue colors, and the red, green, and blue sub-color filters are separated, and the liquid crystal layer 150 is transmitted through the filter. It consists of a black matrix 106 that blocks light.

The black matrix 106 may include an organic film made of a resin material, for example, acrylic, epoxy, or polyimide resin including either carbon black or black pigment. Colored organic resins and the like can be applied.

As shown in FIG. 4, the color filter 107 may be formed on the color filter substrate 105 on which the black matrix 106 is formed. Conversely, after the color filter 107 is first formed on the color filter substrate 105 A black matrix 106 may be formed.

At this time, the column spacers 130a and 130b according to the exemplary embodiment of the present invention have a dual structure, and the first column spacer 130a (hereinafter, referred to as hereinafter) maintains a gap between the color filter substrate 105 and the array substrate 110. , A gap spacer), and a second column spacer 130b (hereinafter, referred to as a pressing spacer) to prevent pressing. However, the present invention is not limited thereto.

When an external force such as pressing from the outside is applied to the liquid crystal panel, light leakage defects occur, and such light leakage defects cause slipping between the color filter substrate 105 and the array substrate 110 due to external force, causing warpage in the liquid crystal panel. There is a cause for it.

That is, in the bending direction of the liquid crystal panel, the rubbing direction of the color filter substrate 105 and the array substrate 110 is not parallel, so that the liquid crystal adjacent to the surface of the color filter substrate 105 and the array substrate 110 It is arranged in parallel in the bending direction, so that the overall arrangement is different from the initial state.

In this case, the arrangement of the liquid crystals cannot maintain the initial black state, so that the light passing through the liquid crystal layer rotates while undergoing a retardation different from that of the normal part, resulting in light leakage.

For this reason, the gap spacer 130a and the pressing spacer 130b are required.

The column spacers 130a and 130b are formed at positions corresponding to the plurality of bumper layers 140, and the gap spacers 130a are spaced apart gaps between the color filter substrate 105 and the array substrate 110. Since it functions to maintain the array substrate 110, it must be configured to contact the bumper layer 140 provided at a position corresponding to the gap spacer 130a among the plurality of bumper layers 140, and the pressed spacer (130b) and the bumper layer 140 provided at a location corresponding thereto should be separated from each other.

As illustrated in FIG. 4, the gap spacer 130a and the bumper layer corresponding thereto may contact each other in the liquid crystal layer 150 positioned between the array substrate 110 and the color filter substrate 105. Here, the liquid crystal layer 150 refers to a layer filled or filled by a liquid crystal (not shown) injected between the array substrate 110 and the color filter substrate 105.

In addition, as shown in FIGS. 1 and 2, the gap spacer 130a and the bumper layer 140 at the corresponding position form a cross shape (+) crossing each other's long sides, so that the gap spacer 130a is pushed up and down by an external force. When the phenomenon occurs, the bumper layer 140 is disposed elongated in the vertical direction, so that the gap spacer 130a escapes the bumper layer and damages the alignment layer made of polyimide (PI) on the surface of the array substrate can be minimized. . As a result, it is possible to prevent a red eye defect in which unwanted light leaks due to damage to the alignment layer. This increases the aperture ratio and transmittance by securing the aperture area while reducing the margin of the black matrix to cover the red eye defect.

As shown in FIGS. 5A and 5B, the pressing spacer 130b faces the bumping layer 140 at a corresponding position with a distance apart from each other, but as shown in FIG. 5A, the pressing spacer ( The thickness t3 of 130b) may be smaller than the thickness t1 of the gap spacer 130a shown in FIG. 4, and the bumper layer at a position corresponding to the pressed spacer 130b as in the embodiment shown in FIG. 5B The thickness t6 of 140 may be smaller than the thickness t2 of the bumper layer 140 at a position corresponding to the gap spacer 130a illustrated in FIG. 4. In the former case, the thicknesses t2 and t4 of the plurality of bumper layers 140 may be the same, and in the latter case, the heights t1 and t5 of the gap spacer 130a and the pressing spacer 130b may be the same. . When the heights of the gap spacer 130a and the pressing spacer 130b are the same, the bumper layer 140 in contact with the gap spacer is referred to as a gap bumper layer, and the bumper layer 140 facing in the region corresponding to the pressing spacer is pressed the bumper layer. It is called this.

The plurality of bumper layers 140, the gap spacers 130a, and the pressing spacers 130b are more advantageous in terms of image quality than those located in the pixel region in terms of image quality. It is preferable to be located in a region where the gate wiring or the common line 108L is located.

In the gap spacer 130a and the pressing spacer 130b, a gap spacer 130a or a pressing spacer 130b may be disposed for each unit pixel composed of at least three sub-pixels, and the resolution of the liquid crystal panel is not limited thereto. Accordingly, the position and number of the gap spacer 130a and the pressing spacer 130b may be adjusted.

1 and 2, a black matrix of sub-pixels adjacent to a region in which the gap spacer 130a and the bumper layer 140 at the corresponding position form a cross shape (+) crossing each other's long sides (106) can consume more aperture area (O/A) than other sub-pixels. In this case, to maximize the aperture area (O/A) of green sub-pixel (G), which has the greatest effect on transmittance. For this purpose, it is preferable to position the gap spacer 130a between the blue sub-pixel (B) and the red sub-pixel (R).

As shown in FIGS. 4, 5A, and 5B, an auxiliary electrode 119 may be provided between the passivation layer 115d and the bumper layer 140. The auxiliary electrode 119 is formed together when the pixel electrode 118 is formed, is spaced apart from the pixel electrode 118, and is a common electrode through the first contact hole 125 of the passivation layer 115d. It is electrically connected to (108). For this reason, it is possible to provide an effect of reducing the number of masks during the manufacturing process to shorten the process time, and a detailed process will be described in more detail below.

Hereinafter, a method of manufacturing a liquid crystal display device according to an embodiment of the present invention configured as described above will be described in detail with reference to the drawings.

6A to 6K are cross-sectional views sequentially illustrating a manufacturing process of the array substrate according to the exemplary embodiment of the present invention shown in FIG. 4.

Referring to the manufacturing process of the array substrate, as shown in FIG. 6A, a gate electrode 221, a gate line (not shown), and a common line (not shown) are formed on the array substrate 210.

The gate electrode 221, the gate line, and the common line are formed by depositing a first conductive layer on the entire surface of the array substrate 210 and then selectively patterning through a photolithography process.

In this case, the first conductive layer is formed of aluminum (Al), aluminum alloy, tungsten (W), copper (Cu), and chromium (Cr) to form a gate wiring and a common line. , Molybdenum (Mo) and a molybdenum alloy may be formed of a low-resistance opaque conductive material. In addition, the first conductive layer may have a multilayer structure in which two or more of the low-resistance conductive materials are stacked.

Next, as shown in FIG. 6B, a gate insulating layer 215a and an amorphous silicon thin film are formed on the entire surface of the array substrate 210 on which the gate electrode 221, the gate line, and the common line are formed.

Thereafter, by selectively removing the amorphous silicon thin film through a photolithography process, an active layer 224 made of the amorphous silicon thin film is formed on the gate electrode 221 with the gate insulating film 215a interposed therebetween.

In FIGS. 6A and 6B, after the gate electrode 221 is formed, the gate insulating layer 215a is formed, and the active layer 224 is formed thereon. However, the active layer 224 is not limited thereto, and the active layer 224 is the array substrate ( 210) and may be formed in the order of the gate insulating layer 215a and the gate electrode 221.

In an embodiment of the present invention, the active layer 224 is formed of an amorphous silicon thin film, but the present invention is not limited thereto, and may be formed using a polycrystalline silicon thin film or an oxide semiconductor.

Next, as shown in FIG. 6C, a second conductive layer is formed on the entire surface of the array substrate 210 on which the active layer 224 is formed.

In this case, the second conductive layer may be made of a low-resistance opaque conductive material such as aluminum, aluminum alloy, tungsten, copper, chromium, molybdenum and molybdenum alloy to form a source electrode, a drain electrode, and a data line, that is, a data line. In addition, the second conductive layer may have a multilayer structure in which two or more of the low-resistance conductive materials are stacked.

Thereafter, by selectively removing the second conductive film through a photolithography process, a source electrode 222 and a drain electrode 223 made of the second conductive film are formed on the active layer 224, while the array substrate A data line (not shown) made of the second conductive layer is formed in the data line area of 210.

Next, as shown in FIG. 6D, an interlayer insulating layer 215b and a planarization layer 215c are formed on the entire surface of the array substrate 210 on which the source electrode 222, the drain electrode 223, and the data line (not shown) are formed. ) To form. At this time, the interlayer insulating layer 215b may be made of an inorganic insulating material such as silicon nitride or silicon oxide, and the planarization layer 215c may be formed using an organic insulating material having a relatively low dielectric constant such as photoacrylic. I can. However, the present invention is not limited thereto, and a planarization layer 215c may not be formed on the interlayer insulating layer 215b.

Thereafter, after depositing a third conductive layer on the entire surface of the array substrate 210, the third conductive layer is selectively patterned using a photolithography process, so that the third conductive layer is applied to the entire pixel portion except for a region in which the second contact hole 220 is to be formed. A common electrode 208 made of a film and electrically connected to the common line through a third contact hole (not shown) is formed.

In this case, the third conductive layer may be made of a transparent conductive material having excellent transmittance such as indium tin oxide (ITO) or indium zinc oxide (IZO).

Next, as shown in FIG. 6E, the planarization layer 215c is selectively patterned using a photolithography process to preferentially expose a region in which the second contact hole 220 is to be formed, and then, FIGS. 6F and 6F. As shown in 6g, after the protective layer 215d and the first photoresist PR_a are formed on the entire surface of the array substrate 210 on which the common electrode 208 is formed, the patterning area is excluded using the mask 305. UV irradiation on the remaining area. Afterwards, a part of the drain electrode 223 is partially removed by removing the PR of the non-irradiated area through a photoresist developing process and selectively patterning the protective layer 215d and the interlayer insulating layer 215b through a dry etching process. A first contact hole 225 is formed to expose a portion of the common electrode 208 while forming the second contact hole 220 to be exposed. The remaining photoresist PR_a is removed through a photoresist strip process.

Thereafter, as shown in FIGS. 6H and 6I, a fourth conductive layer 228 is deposited on the entire surface of the array substrate 210 on which the protective layer 215d is formed, and the pixel electrode 218 and the auxiliary electrode 219 are formed. And a second photoresist PR_b for forming the bumper layer 240.

In this case, the fourth conductive layer 228 may be made of a transparent conductive material having excellent transmittance such as ITO or IZO. The fourth conductive layer 228 comes into contact with the drain electrode 223 and the common electrode 208 through the first contact hole 225 and the second contact hole 220.

Next, as shown in FIGS. 6J and 6K, using a half-tone mask 310, UV irradiation on the remaining photoresist regions except for the area to be patterned, and the pixel electrode through a photoresist developing process. The pixel electrode 218 connected to the drain electrode 223 by removing the second photoresist PR_b except for the area where 218 and the bumper layer 240 are to be formed, and etching the exposed fourth conductive layer 228. ) Is spaced apart from the pixel electrode 218 and is connected to the common electrode 208 to form an auxiliary electrode 219. The etching process may be a wet etch process.

Here, the thickness of the second photoresist PR_b in the region where the pixel electrode 218 irradiated with relatively weak UV is to be formed is the second photoresist PR_b in the region where the bumper layer 240 is not irradiated with UV May be smaller than the thickness of ).

Thereafter, the second photoresist PR_b on the pixel electrode 218 is removed through an ashing process of oxidizing the second photoresist PR_b in an oxygen atmosphere, and the second photoresist remaining on the auxiliary electrode 219 ( The bumper layer 240 is formed with PR_b). Through this, since the pixel electrode 218 and the bumper layer 240 can be formed in a single mask process, the number of mask processes can be saved.

In one embodiment, when UV irradiation on the photoresist, by irradiating UV using a multi-tone mask instead of the half-tone mask 310, the height of the plurality of bumper layers 240 formed on the panel may be different. . In this case, when forming spacers in the color filter substrate process, spacers having the same height may be formed on the color filter substrate without using a multi-tone mask.

In the process of forming the plurality of bumper layers 240, the auxiliary electrode 219 remains under the plurality of bumper layers 240. As a feature of the process, the upper surface area of the auxiliary electrode 219 is If you do, it can remain larger than the area. When the auxiliary electrode 219 is formed by forming the fourth conductive layer 228 of an ITO material, a portion having an area larger than the lower surface of the bumper layer 240 is referred to as an ITO tail.

The planarization layer 215c may be formed to have a thickness of about 2 μm or more in consideration of planarization of the lower layers of the planarization layer 215c and the formation of capacitance between the electrodes above and below the planarization layer 215c. In this case, the second The contact hole 220 is formed deeper than the thickness of the planarization layer 215c. In the above structure, if the second photoresist PR_b is applied, a level difference of the second photoresist PR_b occurs to some extent in the area of the second contact hole 220. The bumper layer 240 is designed to have a thickness of less than 2 μm, which is smaller than the thickness of the planarization layer 215c in consideration of the overall thickness of the panel. When formed to overlap the second contact hole 220, the thickness of the bumper layer 240 The bumper layer 240 may not properly perform the role of the bumper layer 240 due to the misalignment. Accordingly, the bumper layer 240 does not overlap with the second contact hole 220 and is formed to be spaced apart from the pixel electrode 218.

7A to 7D are cross-sectional views sequentially illustrating a manufacturing process of the color filter substrate according to the embodiment of the present invention shown in FIG. 4.

Referring to the manufacturing process of the color filter substrate, as shown in FIG. 7A, a black matrix 206 is formed on the color filter substrate 205 made of a transparent insulating material such as glass to block unnecessary light.

The black matrix 206 may be formed of an organic film made of a resin material. For example, a colored organic resin such as acrylic, epoxy or polyimide resin including either carbon black or black pigment may be applied.

Next, as shown in FIG. 7B, a red color filter 207 is formed on the color filter substrate 205 on which the black matrix 206 is formed. In this case, instead of the red sub-color filter R, a green sub-color filter or a blue sub-color filter may be formed first.

Next, as shown in FIG. 7C, an overcoat layer 209 is formed on the color filter substrate 205 on which the color filter 207 is formed to be planarized, and then, as shown in FIG. 7D, the overcoat layer 209 A column spacer 230a (not shown) including a gap spacer 230a and a pressing spacer (not shown) is formed on the color filter substrate 205 on which) is formed.

Next, as shown in FIG. 4, the array substrate 110 is bonded to face the color filter substrate 105 while maintaining a cell gap through a column spacer 130a (not shown), and a liquid crystal layer therebetween. To form a liquid crystal panel.

At this time, the column spacers 130a (not shown) face each other with the bumper layer 140, the gap spacers 130a contact each other on the bumper layer 140 and the liquid crystal layer 150, and the pressed spacers are the bumper layers. And face each other at a certain interval.

A step of bonding the array substrate 110 and the color filter substrate 105 or a phenomenon in which the gap spacer 130a is pushed up and down by an external force after bonding may occur. As shown in FIGS. 1 and 2, the gap spacer The bumper layer 140 at the position corresponding to (130a) crosses the long side of the gap spacer 130a and is disposed to be elongated in the vertical direction, so that the gap spacer 130a leaves the bumper layer 140 and leaves the surface of the array substrate 110. It is possible to minimize a phenomenon that damages the alignment layer made of polyimide (PI). As a result, it is possible to prevent a red eye defect in which unwanted light leaks due to damage to the alignment layer. Through this, the aperture ratio and transmittance can be increased by securing the aperture area while reducing the margin of the black matrix 106 to cover the red eye defect.

Although many items are specifically described in the above description, this should be construed as an example of a preferred embodiment rather than limiting the scope of the invention. Therefore, the invention should not be determined by the described embodiments, but should be determined by the claims and equivalents to the claims.

105, 205: color filter substrate 106, 206: black matrix
107, 207: color filter 110, 210: array substrate
130a, 230a: gap spacer 130b: pressing spacer
140, 240: bumper layer

Claims (20)

A first substrate and a second substrate in which a plurality of pixels each having a plurality of sub-pixels are disposed in a matrix form, and are bonded to each other to face each other with a liquid crystal layer therebetween;
A black matrix and a color filter disposed under the second substrate;
A column spacer having a first column spacer and a second column spacer disposed under a region where the black matrix and the color filter overlap;
A pixel electrode disposed on the first substrate;
A plurality of bumper layers disposed above the pixel electrodes on the first substrate and spaced apart from the pixel electrodes;
A common electrode disposed on the first substrate; And,
An auxiliary electrode disposed between the common electrode and the bumper layer, made of the same material as the pixel electrode, spaced apart from the pixel electrode, and electrically connected to the common electrode,
At least one of the plurality of bumper layers and the first column spacer contact each other in the liquid crystal layer.
The method of claim 1,
A thin film transistor liquid crystal display device further comprising a protective layer disposed between the common electrode and the auxiliary electrode, wherein the common electrode and the auxiliary electrode contact each other through a first contact hole formed in the protective layer.
The method of claim 2,
A liquid crystal display device further comprising a thin film transistor disposed on the first substrate, wherein one of a source electrode or a drain electrode of the thin film transistor contacts the pixel electrode through a second contact hole formed in the protective layer.
The method of claim 3,
Further comprising a planarization layer disposed between the thin film transistor and the protective layer,
The thickness of the planarization layer is greater than the thickness of the plurality of bumper layers.
The method of claim 1,
At least one second bumper layer among the plurality of bumper layers faces each other at a predetermined distance from the second column spacer and the liquid crystal layer.
The method of claim 5,
A liquid crystal display device having a thickness of the at least one first bumper layer greater than that of the at least one second bumper layer.
The method of claim 1,
The first column spacer and the second column spacer have different shapes.
The method of claim 1,
The at least one first bumper layer and the first column spacer have a cross shape crossing long sides of each other.
The method of claim 8,
The first column spacer overlaps the second contact hole.
A first substrate including a plurality of gate lines and a plurality of data lines;
A plurality of pixels disposed on the first substrate, each having a plurality of sub-pixels; And
It includes a plurality of bumper layers provided on the plurality of gate lines,
The plurality of bumper layers are provided at least one in each of the plurality of pixels, and are disposed between second contact holes provided in each of the plurality of sub-pixels.
The method of claim 10,
At least one of the plurality of sub-pixels,
A thin film transistor disposed on the first substrate and including a gate electrode, a source electrode, and a drain electrode;
A pixel electrode disposed on the thin film transistor and electrically connected to the drain electrode;
A common electrode disposed on the thin film transistor; And
A liquid crystal display device comprising an auxiliary electrode disposed between one of the plurality of bumper layers and the common electrode, made of the same material as the pixel electrode, and electrically connected to the common electrode.
The method of claim 10,
A gap spacer or a pressing spacer is provided on each of the plurality of bumper layers,
The gap spacer overlaps the second contact hole.
The method of claim 12,
Among the plurality of bumper layers, a first bumper layer corresponding to the gap spacer abuts the gap spacer, and a second bumper layer corresponding to the pressing spacer among the plurality of bumper layers faces each other at a predetermined interval from the pressing spacer Liquid crystal display.
The method of claim 13,
The gap spacer and the pressing spacer have the same thickness, and the first bumper layer has a larger thickness than the second bumper layer.
The method of claim 13,
The gap spacer has a thickness greater than that of the pressed spacer, and the plurality of bumper layers have the same thickness.
The method of claim 13,
The first bumper layer and the gap spacer have a cross shape crossing long sides of each other.
Forming a thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode on the first substrate;
Forming a planarization layer on the thin film transistor;
Forming a common electrode on the planarization layer;
Forming a protective layer on the planarization layer and the common electrode;
Forming a second contact hole through which a portion of the drain electrode is exposed and a first contact hole through which a portion of the common electrode is exposed in the protective layer;
Forming a conductive film on the entire surface of the protective layer in which the first and second contact holes are formed;
After forming a photoresist on the conductive layer, the conductive layer is patterned to form an auxiliary electrode in contact with the common electrode through the first contact hole, spaced apart from the auxiliary electrode, and the second contact hole. Forming a pixel electrode in contact with the drain electrode; And
And forming a bumper layer on the auxiliary electrode with the remaining photoresist and patterning the conductive layer.
The method of claim 17,
Before forming the planarization layer
Further comprising the step of forming an interlayer insulating layer on the thin film transistor,
In the step of forming the first contact hole and the second contact hole, dry etching the interlayer insulating layer and the protective layer at the same time to form the first contact hole and the second contact hole.
The method of claim 17,
The step of forming the pixel electrode,
Irradiating UV to the photoresist using a half-tone mask or a multi-tone mask; And
And forming the pixel electrode and the auxiliary electrode through a photoresist developing process and an etching process.
The method of claim 17,
Forming column spacers on the second substrate; And
And bonding the first substrate and the second substrate while maintaining a cell gap through the column spacer and the bumper layer, wherein the column spacer and the bumper layer face each other. .

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