KR20200116006A - Single Crystal Layer Structure and Micro LED and Micro LED Module having the Same and Manufacturing Method of them - Google Patents

Abstract

The present invention discloses a single crystal layer structure and a micro LED and a micro LED module having the same and manufacturing method thereof. The single crystal layer structure includes: a transparent substrate; a transparent electrode layer formed on the substrate; a lattice matching layer formed on the electrode layer; a buffer layer deposited using the lattice matching layer as a crystal nucleus; and a single crystal layer formed on the upper surface of the buffer layer, wherein the lattice matching layer is formed of a material having the same or similar lattice constant as the buffer layer and the single crystal layer. According to the present invention, the single crystal layer structure includes a single crystal layer formed directly on the substrate in a non-transfer method.

Description

Single Crystal Layer Structure and Micro LED and Micro LED Module Having the Same and Manufacturing Method of them

The present invention relates to a single crystal layer structure, a micro LED and a micro LED module including the same, and a method of manufacturing the same.

Micro LED is a self-luminous device using the characteristics of a compound semiconductor, and it is capable of realizing images with high efficiency, fast response speed, high viewing angle, and high definition. It is in the spotlight as the most suitable device for realizing next-generation displays with its power consumption efficiency 5 times higher than that of existing OLEDs, high contrast ratio of 1,000,000:1 or higher, and realization of a 400-inch super-large display.

Micro LED has endless applications from smartphones to TVs, digital signage, smart cars, virtual reality/augmented reality, and wearable displays. In fact, Apple and Google have announced that they will apply micro LED technology to Apple Watch, smart glasses, and AR (augmented reality) wearable devices. In particular, for the full-scale commercialization of micro LEDs, we are building a broad portfolio of micro LED IPs in preparation for licensing and patent disputes. This situation is expected to be a move to contain domestic display companies that have a dominant position in the global display market. Therefore, in order to preoccupy a competitive advantage in the next-generation display market, where competition is fiercer, it is urgent to develop high-quality, low-cost micro LED materials and process technology that can be commercialized.

The core technology of micro LED manufacturing is a technology that perfectly integrates ultra-fine LED chips into the display panel. Representative micro LED integration methods that are currently being actively studied include a transfer process or a wafer bonding method. The transfer process is a method of forming micro LEDs on a wafer and then picking them out and placing them directly on a flat panel. Hundreds of thousands to millions of micro LEDs must be perfectly placed on the panel. The wafer bonding method is a method of directly bonding a micro LED wafer on a driving substrate, and two substrates must be accurately aligned and contacted. Both methods are very complicated and difficult to process because it is necessary to accurately place ultra-fine LED chips on millions of pixels on a large-area substrate. In addition, both methods have a limitation in securing a high yield because defects are induced in the process of forming pixels on a large display panel.

An object of the present invention is to provide a single crystal layer structure including a single crystal layer directly formed on a substrate by a non-transfer method, a micro LED and a micro LED module including the same, and a method of manufacturing the same.

The single crystal layer structure according to an embodiment of the present invention is deposited using a transparent substrate, a transparent electrode layer formed on the substrate, a lattice matching layer formed on the electrode layer, and the lattice matching layer as a crystal nucleus. And a buffer layer and a single crystal layer formed on an upper surface of the buffer layer, wherein the lattice matching layer is formed of a material having the same or similar lattice constant as the buffer layer and the single crystal layer.

In addition, the method of manufacturing a single crystal layer structure according to an embodiment of the present invention includes forming an electrode layer on an upper surface of a substrate, forming a lattice matching layer on top of the electrode layer, and forming a lattice matching layer on top of the electrode layer. A buffer layer forming step of depositing a buffer layer using the lattice matching layer as a crystal nucleus from the top, and a single crystal layer forming step of forming a single crystal layer on an upper surface of the buffer layer, wherein the lattice matching layer includes the buffer layer and the single crystal layer and a lattice constant Is formed of the same or similar material.

In addition, the micro LED according to an embodiment of the present invention includes a transparent substrate, a first transparent electrode formed on the substrate, a lattice matching layer formed on the electrode layer, and the lattice matching layer as a crystal nucleus. A buffer layer deposited by doing so, a first semiconductor layer formed on the upper surface of the buffer layer, an active layer formed on the upper surface of the first semiconductor layer, and a second semiconductor layer and the second semiconductor layer formed on the upper surface of the active layer. It characterized in that it comprises a second electrode formed on the upper surface.

In addition, the micro LED module according to an embodiment of the present invention is formed of a micro LED having the above structure, is formed of at least one R pixel emitting a red wavelength, a micro LED having the above structure, and has a green wavelength It is formed of at least one G pixel emitting light and a micro LED having the above structure, and comprises at least one B pixel emitting a blue wavelength.

In addition, a method of manufacturing a micro LED according to an embodiment of the present invention includes a first electrode forming step of forming a first electrode on an upper surface of a substrate, and a grid matching layer forming step of forming a grid matching layer on the top of the first electrode. And, forming a buffer layer on top of the first electrode using the lattice matching layer as a crystal nucleus to deposit a buffer layer; forming a first semiconductor layer on the upper surface of the buffer layer; and an active layer on the upper surface of the first semiconductor layer. And a step of forming an LED layer including forming a second semiconductor layer on an upper surface of the active layer and a second electrode forming step of forming a second electrode on an upper surface of the second semiconductor layer, wherein the The lattice matching layer is formed of a material having the same or similar lattice constant as the buffer layer and the first semiconductor layer.

In addition, the method of manufacturing a micro LED module according to an embodiment of the present invention includes a first LED including a lattice matching layer, a buffer layer, a first semiconductor layer, a first active layer, and a second semiconductor layer on the upper surface of the substrate by the above method. A first LED layer forming step of forming a layer, a first micro LED forming step of forming a first micro LED by patterning the first LED layer, and a top surface of the second semiconductor layer of the first micro LED. Forming a first mask layer in which a first mask layer is formed in a region, and a second LED pattern forming a second LED pattern by etching a first mask layer in a region corresponding to the second LED region on the substrate And forming a second microLED by forming a second active layer and the second semiconductor layer on an upper surface of the first semiconductor layer inside the second LED pattern; and a top surface of the second semiconductor of the second microLED. A second mask layer forming step of forming a second mask layer in a region including, and forming a third LED pattern by etching the second mask layer in a region corresponding to a third LED region above the substrate. 2 forming an LED pattern; forming a third micro-LED by forming a third active layer and the second semiconductor layer on the upper surface of the first semiconductor layer inside the third LED pattern; and forming a third micro-LED; 2 A mask layer removing step of removing the mask layer positioned on the micro LED, and a second electrode forming a second electrode on the upper surface of the second semiconductor layer of the first micro LED, the second micro LED, and the third micro LED. It characterized in that it comprises an electrode forming step.

The single crystal layer structure of the present invention and a method of manufacturing the same can directly form a single crystal thin film on a substrate having a different lattice constant from the single crystal.

In addition, the micro LED of the present invention, the micro LED module and its manufacturing method, since the micro LED is directly formed on the circuit board, there is no defect during the transfer of the micro LED compared to the conventional transfer method, thereby increasing luminous efficiency, resolution and lifespan. I can make it.

In addition, in the micro LED of the present invention, the micro LED module, and the manufacturing method thereof, since the micro LED is directly formed on a circuit board, the manufacturing time can be shortened and the yield can be increased compared to the conventional transfer method.

In addition, the micro-LED and micro-LED module of the present invention and its manufacturing method form a lattice matched layer (LML) on a transparent electrode for a light-emitting pixel and directly grow a single crystal thin film of GaN on the transparent electrode for a light emitting pixel. Micro LEDs can be placed on the area in a monolithic manner.

In the micro LED and micro LED module of the present invention, and a manufacturing method thereof, since the first electrode and the second electrode are positioned in the vertical direction, the electrode area is larger than the conventional structure in which the first electrode and the second electrode are positioned in the horizontal direction. As it increases, it is possible to improve the injection efficiency of the current along with the increase in the area of the light emitting region.

In the micro LED and micro LED module of the present invention and a method of manufacturing the same, since photons emitted from the active layer are entirely emitted to the second semiconductor layer, the number of emitted light particles is reduced to the inside of the second semiconductor layer. As a result, the light output characteristics can be improved.

The micro LED and micro LED module of the present invention and its manufacturing method increase the thickness and area of the second electrode supplying current to the existing LED cell and the current is injected in the vertical direction, so that the flow of current is stable and the light output efficiency Can be increased.

1 is a perspective view of a single crystal layer structure according to an embodiment of the present invention.
2A is a vertical cross-sectional view taken along AA in FIG. 1.
2B is a vertical cross-sectional view corresponding to FIG. 2A of a single crystal layer structure according to another embodiment of the present invention.
3 is a vertical cross-sectional view corresponding to FIG. 2A of a single crystal layer structure according to another embodiment of the present invention.
4 is a flowchart illustrating a method of manufacturing a single crystal layer structure according to an embodiment of the present invention.
5 is a vertical cross-sectional view of a step of forming an electrode protective layer in a method of manufacturing a single crystal layer structure according to an embodiment of the present invention.
6 is a perspective view of a micro LED according to an embodiment of the present invention.
7 is a flowchart of a method of manufacturing a micro LED according to an embodiment of the present invention.
8 is a partial plan view of a micro LED module patterned according to the method of manufacturing the micro LED according to FIG. 7.
9 is a flowchart of a method of manufacturing a micro LED module according to an embodiment of the present invention.
10 is a partial perspective view of a micro LED module manufactured by the method of manufacturing the micro LED module of FIG. 9.

Hereinafter, a single crystal layer structure, a micro LED, a micro LED module, and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the accompanying drawings.

First, a single crystal layer structure according to an embodiment of the present invention will be described.

1 is a perspective view of a single crystal layer structure according to an embodiment of the present invention. 2A is a vertical cross-sectional view taken along line A-A of FIG. 1. 2B is a vertical cross-sectional view corresponding to FIG. 2A of a single crystal layer structure according to another embodiment of the present invention.

The single crystal layer structure 10 according to an embodiment of the present invention includes a transparent substrate 11, an electrode layer 12, a lattice matching layer 13, a buffer layer 14, and reference to FIGS. 1 and 2A. A single crystal layer 15 is included. The single crystal layer structure 10 may further include an electrode protective layer 12a.

The single crystal layer structure 10 includes a single crystal layer 15 constituting a part of the micro LED on the transparent substrate 11 on which a device such as a micro LED is formed. In the single crystal layer structure 10, the lattice matching layer 13 acts as a crystal nucleus, so that a single crystal layer 15 having the same lattice constant or different from each other may be directly formed on the transparent substrate 11. In addition, the single crystal layer structure 10 may be formed on a substrate other than the transparent substrate 11.

The transparent substrate 11 is any one material selected from a glass substrate, sapphire, gallium nitride (GaN), silicon carbide (SiC), AlGaN, AlN, ZnO, MgO, MgZnO, Ga ₂ O ₃ and quartz Can be formed as In particular, the transparent substrate 11 may be a glass substrate or a substrate such as amorphous silicon. The transparent substrate 11 may be formed of a transparent resin film. For example, the transparent substrate 11 may be formed of a polyimide (PI) film or a polyester (PET) film. The transparent substrate 11 may be a substrate for micro LEDs. Accordingly, a plurality of LED cells may be formed on the upper surface of the transparent substrate 11. In addition, the transparent substrate 11 may be a substrate of a flat panel display panel. The transparent substrate 11 may be formed in an area corresponding to the total area of the flat panel display panel.

The electrode layer 12 may be formed on the upper surface of the transparent substrate 11 to a predetermined thickness. The electrode layer 12 may be formed of a transparent electrode layer. The electrode layer 12 may be formed as an n-electrode. The electrode layer 12 is selected from indium tin oxide (ITO), zinc oxide (ZnO), tin oxide (SnO ₂ ), nickel oxide (NiO), indium oxide (In ₂ O ₃ ), and gallium oxide (Ga ₂ O ₃ ). It may be formed of an oxide material including at least one selected. In addition, the electrode layer 12 may be formed of an oxide material including at least one selected from Al, Ga, Ag, Sn, In, Zn, Co, Ni, and Au. In addition, the electrode layer 12 is at least one selected from Ni, Au, Mr, Cr, Co, Cu, Rb, Ru, Rh, Pd, Ag, Sn, W, Ir, Pt, La, Ce, Na, and Eu. It may be formed of a metal material or an alloy material including one. In addition, the electrode layer 12 may be formed of carbon nanotubes or graphene. The electrode layer 12 may be formed as a single layer or multiple layers. The electrode layer 12 may be formed to have a light transmittance of 70% or more. The electrode layer 12 may be entirely formed in a region of the transparent substrate 11 in which the LED cell is formed. In addition, the electrode layer 12 may be formed in an area corresponding to the planar area of the device positioned thereon. The electrode layer 12 may be formed to have a predetermined thickness. The electrode layer 12 may be formed to a thickness of 10 to 200 nm. When the electrode layer 12 is formed of a metal material or an alloy material, the electrode layer 12 may be formed to have a thickness of 30 nm or less for light transmittance.

The electrode protective layer 12a may be formed of a metal layer having a predetermined thickness on the upper surface of the electrode layer 12. The electrode protective layer 12a is at least one selected from Ni, Au, Mr, Cr, Co, Cu, Rb, Ru, Rh, Pd, Ag, Sn, W, Ir, Pt, La, Ce, Na, and Eu. It may contain one metallic material. In addition, the electrode protective layer 12a may include at least one ceramic material selected from Al ₂ O ₃ , TiO ₂ , SiO ₂ , and SiN. In addition, the electrode protective layer 12a may be formed of a general passivation material.

The electrode protective layer 12a may be formed as a single layer or a plurality of layers. The electrode protective layer 12a may be formed to a thickness of 0.5 to 100 nm. The electrode protection layer 12a may have a light transmittance of 90% or more.

The electrode protective layer 12a may prevent damage to the electrode layer 12 located below the lattice matching layer 13 or the buffer layer 14 during a deposition process. For example, the electrode protective layer 12a may prevent the electrode layer 12 from being damaged during the MOCVD process, which is a process of forming the single crystal layer 15 on the electrode layer 12.

The lattice matching layer 13 may be formed by dispersing single crystal particles on the electrode protective layer 12a or the upper surface of the electrode layer 12. The lattice matching layer 13 may be formed of a material having the same or similar lattice constant as the material forming the buffer layer 14 formed thereon. The lattice matching layer 13 may act as a crystal nucleus for the buffer layer 14, and the lattice matching layer 13 is made of a material having the same or similar lattice structure as the single crystal layer 15 formed on the upper surface. Can be formed. In addition, the lattice matching layer 13 may have the same or similar coefficient of thermal expansion as the single crystal layer 15. For example, the lattice matching layer 13 may be formed of a material having a similar lattice constant or crystal structure to GaN forming the single crystal layer 15. The lattice matching layer 13 has a lattice structure similar to a wurtzite crystal structure of GaN, which is a material forming the single crystal layer 15. The lattice matching layer 13 is sapphire, AlGaN, InGaN, GaN, CrN, MgAl ₂ O ₄ , Gd ₂ O ₃ , Ga ₂ O ₃ , SiC, TiN, AlN, Si, ZnO, MgO, CdO, MgZnO, CdZnO And it may be formed of at least one matching material selected from BN.

The lattice matching layer 13 may be formed in a form in which a plurality of single crystal particles are spaced apart from each other and dispersed or partially agglomerated and dispersed. The single crystal particles may be formed by pulverizing particles, pellets, or thin plates of various shapes formed of a matching material into nano-sized particles. The single crystal particles may have a size of several nanometers to tens of nanometers. In addition, the lattice matching layer 13 may be formed through a sol-gel process. More specifically, the lattice matching layer 13 may be formed by applying a sol-gel solution containing a precursor material of a lattice material and crystallizing it.

The lattice matching layer 13 may be formed in a form in which nano-sized single crystal particles 13a are dispersed on the upper surface of the electrode layer 12 or the electrode protective layer 12a, as shown in FIGS. 1 and 2A. . In addition, the lattice matching layer 13 may be formed in the form of a thin film as shown in FIG. 2B. The lattice matching layer 13 may be formed in a region including a region in which an LED cell is formed. The lattice matching layer 13 may be formed at positions corresponding to positions of a plurality of LED cells spaced apart from each other. The lattice matching layer 13 may be formed in a region including a region in which the single crystal layer 15 is formed.

The lattice matching layer 13 may have a light transmittance of 70% or more in order to prevent a decrease in luminous efficiency of the LED cell. In addition, the lattice matching layer 13 may have a transparency of 60% or more. In addition, the grid matching layer 13 may have a predetermined electrical conductivity. For example, the lattice matching layer 13 may have a resistance less than 200Ω. The lattice matching layer 13 may be formed to a thickness of several nanometers to tens of nanometers. If the thickness of the lattice matching layer 13 is too thick, the electrical conductivity of the single crystal layer 15 formed thereon may decrease.

The lattice matching layer 13 allows the single crystal layer 15 constituting the LED cell to be directly deposited on the electrode layer 12 to be formed. The single crystal particles of the lattice matching layer 13 may act as a nucleation site when the buffer layer 14 is deposited. In addition, the single crystal particles of the lattice matching layer 13 may function as crystal nuclei when the single crystal layer 15 is deposited. The lattice matching layer 13 serves as a pre-orienting layer for maximally matching the main growth direction of the buffer layer 14 with the growth direction of the single crystal layer 15. Since the single crystal grains have the same or similar lattice constant as the material of the single crystal layer 15, the single crystal layer 15 is formed in a good single crystal structure.

The buffer layer 14 may be formed in a region including between single crystal particles of the lattice matching layer 13 on the electrode protective layer 12a or on the upper surface of the electrode layer 12. The buffer layer 14 is formed as a thin film layer of several nanometers by depositing the lattice matching layer 13 as a crystal nucleus. The buffer layer 14 may grow in a horizontal direction on the top surface of the electrode layer 12 centering on single crystal grains or single crystal grains of the lattice matching layer 13. In addition, the buffer layer 14 may be formed while the single crystal layer 15 is grown thereon. The 　buffer layer 14 is 　three-dimensional 　island 　 shape 　 can be formed 　. 　 Also, the 　 buffer layer 14 is 　 a predetermined thickness 　 thin film 　 formed 　 a single crystal layer (14) is deposited on the top of the buffer layer. It may be formed of the same material as the material of 15. Therefore, the buffer layer 14 is formed to have the same lattice structure or lattice constant as the single crystal layer 15 formed thereon. The buffer layer 14 is a low temperature MOCVD The buffer layer 14 may be formed by crystallization at 400 to 600° C., which is relatively lower than the growth conditions of the single crystal layer 15. The buffer layer 14 may form adjacent crystal nuclei. A plurality of thin film layers grown along the horizontal direction centered on each other may be formed as a thin film layer having a polycrystalline structure while the buffer layer 14 is formed such that the main growth direction matches the growth direction of the single crystal layer 15 Therefore, the buffer layer 14 allows a single crystal layer 15 having a high-quality crystal structure to be formed on an upper surface of the buffer layer 14. On the other hand, a problem of lattice mismatching when the single crystal layer 15 is grown. Since the lattice matching layer 13 and the buffer layer 14 are used to solve the problem, when the single crystal layer 15 is well grown on the lattice matching layer 13, the buffer layer 14 can be excluded.

The single crystal layer 15 may be formed as a thin film layer having a single crystal structure on the upper surface of the buffer layer 14. The single crystal layer 15 may be formed as a thin film layer having a predetermined thickness. The single crystal layer 15 may be formed of various materials depending on the device in which the single crystal layer structure 10 is used. When the single crystal layer structure 10 is used in a micro LED device, the single crystal layer 15 may be formed of a semiconductor layer constituting an LED cell. The single crystal layer 15 may be formed of an n-type semiconductor layer or a p-type semiconductor layer. The single crystal layer 15 may be formed of an n-type nitride-based semiconductor layer. The single crystal layer 15 may be formed of an n-GaN layer. In addition, the single crystal layer 15 may be formed of a p-type nitride semiconductor layer. The single crystal layer 15 may be formed of a p-GaN layer. The single crystal layer 15 may be formed of an n-type semiconductor layer or a p-type semiconductor layer including GaN. For example, the single crystal layer 15 may be formed by doping a GaN single crystal with an n-type dopant such as Si, Ge, Sn, Se, or Te.

The single crystal layer 15 is formed by depositing on the upper surface of the buffer layer 14. Therefore, since the single crystal layer 15 is formed on the upper surface of the buffer layer 14 of the same material, which is grown at a lower temperature than the single crystal layer 15 and has a low crystallinity, it can be formed into a single crystal structure having a relatively good crystal structure. For example, the single crystal layer 15 may be formed in a single crystal structure of an n-GaN layer. The single crystal layer 15 may have an AFM roughness of 3 nm or less.

The single crystal layer 15 may be formed by a high-temperature MOCVD process. The single crystal layer 15 may be formed at a higher temperature than the MOCVD process in which the buffer layer 14 is formed. For example, the single crystal layer 15 may be formed by an MOCVD process performed at a high temperature of 1,000°C or higher.

Next, a single crystal layer structure according to another embodiment of the present invention will be described.

3 is a vertical cross-sectional view corresponding to FIG. 2A of a single crystal layer structure according to another embodiment of the present invention. Hereinafter, a single crystal layer structure according to another embodiment of the present invention will be described centering on a portion different from the single crystal layer structure according to the embodiments of FIGS. 1 and 2A.

In the single crystal layer structure 10 according to another embodiment of the present invention, as shown in FIG. 3, an electrode protective layer 12a may be formed between the electrode layer 12 and the lattice matching layer 13. In the single crystal layer structure 10, the electrode protection layer 12a may be formed on the electrode layer 12 exposed between the lattice matching layers 13. In addition, the electrode protective layer 12a may be formed to have a thickness that partially exposes the lattice matching layer 13. That is, the electrode protection layer 12a may be formed to have a height smaller than the height of the grid matching layer 13. Accordingly, the single crystal particles of the lattice matching layer 13 are exposed to the upper surface of the electrode protective layer 12a to act as crystal nuclei for the buffer layer 14.

Next, a method of manufacturing a single crystal layer structure according to an embodiment of the present invention will be described.

4 is a flowchart of a method of manufacturing a single crystal layer structure according to an embodiment of the present invention.

In the method of manufacturing a single crystal layer structure according to an embodiment of the present invention, referring to FIG. 4, an electrode layer forming step (S10), a lattice matching layer forming step (S30), a buffer layer forming step (S40), and a single crystal layer forming step It includes (S50). In addition, the method of manufacturing the single crystal layer structure may further include forming an electrode protective layer (S20). The single crystal layer structure manufacturing method is a method of manufacturing the single crystal layer structure 10 according to FIGS. 1 to 2A.

The single crystal layer structure manufacturing method may form part of a micro LED manufacturing method in which the single crystal layer structure 10 is used. For example, the step of forming a single crystal layer (S50) may be a step of forming a semiconductor layer positioned below the LED cell of the micro LED.

In the method of manufacturing the single crystal layer structure, the lattice matching layer 13 and the buffer layer 14 may be formed on the electrode layer 12 and the single crystal layer 15 may be formed on the electrode layer 12. Accordingly, the single crystal layer structure 10 may directly form the single crystal layer 15 on the electrode layer 12. The single crystal layer structure 10 includes a single crystal layer 15 directly on top of the electrode layer 12 by using a lattice matching layer 13 formed of a material having the same or similar lattice constant and thermal expansion coefficient as the single crystal layer 15. Can be formed. The method of manufacturing the single crystal layer structure is a transfer process, and the single crystal layer 15 may be formed by a direct deposition method using the lattice matching layer 13. The single crystal layer 15 may be formed as a semiconductor layer constituting an LED cell of a micro LED. Therefore, the method of manufacturing the single crystal layer structure solves the problem of lattice mismatching due to a difference in lattice constant and thermal expansion coefficient between the electrode 12 and the semiconductor layer 15. The lattice matching layer 13 and the buffer layer 14 ) Can be used. The method of manufacturing the single crystal layer structure is a method capable of forming the single crystal layer 15 through a defect-free process. In addition, in the method of manufacturing the single crystal layer structure, since the lattice matching layer 13 is coated on the upper surface of the electrode layer 12 in a solution process-based method, the single crystal layer 15 having a large area can be formed.

The electrode layer forming step (S10) is a step of forming the electrode layer 12 on the upper surface of the transparent substrate 11. The electrode layer 12 may be formed of a transparent electrode layer. In the forming of the electrode layer 12, the electrode layer 12 may be formed to have a predetermined thickness. For example, in the electrode layer forming step (S10), the electrode layer 12 may be formed to a thickness of 10 to 200 nm. In the electrode layer forming step (S10), when the electrode layer 12 is formed of a metal material or an alloy material, the electrode layer 12 may be formed to a thickness of 30 nm or less for light transmittance.

The electrode layer 12 may be entirely formed in a region of the transparent substrate 11 in which an LED cell constituting a micro LED is formed. In addition, the electrode layer 12 may be formed in an area corresponding to the planar area of the LED cell disposed thereon.

The electrode layer forming step S10 may be performed by a general electrode forming method. For example, in the electrode layer forming step S10, the electrode layer 12 may be formed by a plasma enhanced chemical vapor deposition method (PECVD) or an atomic layer deposition method (ALD). In addition, in the electrode layer forming step (S10), the electrode layer 12 may be formed by a physical vapor deposition method (PVD) such as a sputtering method, a vacuum deposition method, or an ion plating method.

The electrode protective layer forming step (S20) is a step of forming an electrode protective layer 12a with a predetermined thickness on the upper surface of the electrode layer 12. The electrode protective layer 12a may be entirely formed on the upper surface of the electrode layer 12. In the electrode protective layer forming step (S20), the electrode protective layer 12a may be formed by a physical vapor deposition method (PVD) or a chemical vapor deposition method (CVD) such as a sputtering method, a vacuum vapor deposition method, or an ion plating method. have.

The lattice matching layer forming step (S30) is a step of forming the lattice matching layer 13 by dispersing single crystal particles on the upper surface of the electrode layer 12 or the electrode protective layer 12a. The lattice matching layer 13 may be formed by dispersing single crystal particles. At least a portion of the grid matching layer 13 may be embedded in the electrode protective layer 12a. In addition, the lattice matching layer 13 may be formed in the form of a thin film in which single crystal particles are entirely coated on the upper surface of the electrode protective layer 12a.

The step of forming the lattice matching layer (S30) may be performed in various processes. The lattice matching layer forming step (S30) may be performed by a sputtering process, a sol-gel process, or a particle dispersion process. Each process will be described in more detail below.

In the sputtering process, a target formed of a matching material is sputtered to form a lattice matching layer 13 on the electrode protective layer 12a or the upper surface of the electrode layer 12. For example, in the sputtering process, a GaN target material may be sputtered to form a GaN lattice matching layer 13. In the sputtering process, a process time and a process atmosphere may be controlled to form single crystal particles that are appropriately dispersed on the electrode protective layer 12a or the upper surface of the electrode layer 12. The lattice matching layer 13 may be formed to a thickness of several nanometers to tens of nanometers.

In the sol-gel process, a sol-gel precursor solution of a matching material is coated on the upper surface of the electrode layer 12 or the electrode protective layer 12a and then heat-treated to form the lattice matching layer 13. The sol-girl precursor solution may be formed by mixing a precursor of a matching material forming single crystal particles in a solvent in a predetermined ratio. The precursor of the matching material may be formed by mixing in a solvent in the form of a cluster. The precursor of the matching material may be a hydrate containing a gallium (Ga) element. For example, the precursor of the matching material may be gallium nitrate hydrate (Ga(NO ₃ ) ₃ ㆍxH ₂ O). In the sol-gel precursor solution, a precursor and a solvent may be mixed at a concentration of 1mM to 10M. In addition, the solvent may be alcohol. In addition, an additive may be added to the sol-gel solution. For example, the sol-gel solution may be added with an additive for increasing the wettability or evaporation rate of the solution. The additive may be diethylamine (DEA).

The sol-gel precursor solution may be coated by a method such as a spray spray method, a spin coating method, a screen printing method, or an electrospray method. In the step of forming the lattice matching layer (S30), single crystal particles may be formed at a sintering temperature of 600°C or higher after coating of the sol-gel precursor solution. In addition, in the step of forming the lattice matching layer (S30), an annealing treatment may be additionally performed at a temperature lower than the heat treatment temperature. In the step of forming the lattice matching layer (S30), the lattice matching layer 13 having an appropriate density and crystallinity of crystal nuclei may be formed by controlling the concentration of the sol-gel precursor solution, the thickness of the coating layer, the heat treatment temperature, and the annealing temperature. . The lattice matching layer 13 may be formed to a thickness of several nanometers to tens of nanometers.

The sol-gel precursor solution may be coated by a sol-gel process such as a spray spray method, a spin coating method, a screen printing method, or an electric spray method. In the sol-gel process, a single crystal may be formed at a sintering temperature of 600 degrees or higher after coating of the sol-gel precursor solution, followed by annealing. In the sol-gel process, the lattice matching layer 13 having an optimum crystal nucleus density and crystallinity may be formed by controlling the concentration of the sol-gel solution, the thickness of the coating layer, and the crystallization temperature. The lattice matching layer 13 may be formed to a thickness of several nanometers to tens of nanometers.

In the particle dispersion process, a solution obtained by dispersing single crystal particles pulverized into nano-sized or micro-sized particles in a solvent is coated on the upper surface of the electrode layer 12 or the electrode protective layer 12a, and then the solvent is evaporated to evaporate the lattice matching layer 13 ) Can be formed. The particle dispersing process is different from a sol-gel process using a precursor because the single crystal particles are directly dispersed on the upper surface of the electrode layer 12 or the electrode protective layer 12a to form the lattice matching layer 13.

The single crystal particles may be manufactured by physically pulverizing a single crystal substrate using an ultrafine particle pulverizer (ball mill, jet mill, impact mill, ACM mill, shear mixer, etc.). In addition, the single crystal particles may be prepared by selectively separating a single crystal thin film grown in a single crystal form on a sapphire substrate and then physically pulverizing it using an ultrafine particle mill. In addition, the single crystal particles may be prepared by physically pulverizing relatively coarse single crystal particles using an ultrafine particle mill.

The lattice matching layer 13 may act as a crystal nucleus during the deposition process of the buffer layer 14. In addition, the lattice matching layer 13 may serve as a crystal nucleus for the single crystal layer 15. The lattice matching layer 13 is an electrode layer 12 positioned below together with the electrode protective layer 12a in a high MOCVD process temperature (at least 1,000 ^o C or higher) and an ammonia/hydrogen atmosphere in the single crystal layer forming step S50 Can protect.

The buffer layer forming step (S40) is a step of forming the buffer layer 14 using single crystal particles of the lattice matching layer 13 as crystal nuclei on the upper surface of the electrode layer 12 or the electrode protection layer 12a. The buffer layer 14 may be formed of a material having the same or similar lattice constant or lattice structure as a material forming the lower lattice matching layer 13.

The step of forming the buffer layer (S40) may be performed by a low-temperature MOCVD process. In the step of forming the buffer layer (S40), the buffer layer 14 may be formed at a relatively low temperature of 400 to 600°C. In the step of forming the buffer layer (S40 ), a buffer layer 14 having a polycrystalline structure may be formed while a plurality of thin film layers grown in a horizontal direction centered on a crystal nucleus of an adjacent lattice matching layer 13 contact each other. Since the buffer layer 14 forms a good polycrystalline structure with relatively few crystal defects, it can be grown in the form of a thin film of the single crystal layer 15 grown thereon.

The single crystal layer forming step (S50) is a step of forming the single crystal layer 15 on the buffer layer 14. The single crystal layer 15 may be formed of an n-type semiconductor layer. For example, the step of forming the single crystal layer (S50) may be performed by doping the GaN single crystal layer 15 with an n-type dopant such as Si, Ge, Sn, Se, or Te. In the step of forming the single crystal layer (S50), the single crystal layer 15 may be formed by a process such as MOCVD or MBE. The single crystal layer forming step (S50) may be performed in a process temperature range of 1,000 ^o C or higher. In the step of forming a single crystal layer (S50), the pre-reaction of reactants constituting GaN may be minimized by sequentially injecting pulse-type Ga and N sources with a predetermined time difference. In the single crystal layer forming step S50, a GaN single crystal thin film may be directly formed on the electrode layer 12.

Next, a method of manufacturing a single crystal layer structure according to another embodiment of the present invention will be described.

5 is a vertical cross-sectional view of a step of forming an electrode protective layer in a method of manufacturing a single crystal layer structure according to another embodiment of the present invention. Hereinafter, a method of manufacturing a single crystal layer structure according to another embodiment of the present invention will be described focusing on parts different from the method of manufacturing a single crystal layer structure according to the embodiment of FIG. 4.

In the method of manufacturing a single crystal layer structure according to another embodiment of the present invention, a single crystal layer structure 10 according to another embodiment of the present invention according to FIG. 3 may be manufactured. That is, in the method of manufacturing a single crystal layer structure according to another embodiment of the present invention, first, the lattice matching layer 13 is formed on the upper surface of the electrode layer 12 and the electrode protective layer 12a is formed on the upper surface thereof. Accordingly, the electrode protective layer 12a may be formed to have a predetermined thickness between single crystal particles of the lattice matching layer 13 on the upper surface of the electrode layer 12. In this case, the electrode protective layer 12a may be formed by the following two methods.

In the method of manufacturing the single crystal layer structure, as shown in FIG. 5A, first, a lattice matching layer 13 is formed on the upper surface of the electrode layer 12. The lattice matching layer 13 may be formed to disperse single crystal particles, or to disperse single crystal particles by coating and heat treatment of a sol-gel precursor solution.

Next, the electrode protective layer 12a is formed by being applied to the upper surface of the electrode layer 12, as shown in FIG. 5B. In this case, the electrode protective layer 12a may be entirely coated on the upper surface of the electrode layer 12 and the single crystal particles forming the lattice matching layer 13. The electrode protective layer 12a may be formed to have a uniform thickness as a whole. In addition, the electrode protective layer 12a may be formed such that a portion of the lattice matching layer 13 where single crystal particles are located relatively protrudes. In addition, the electrode protective layer 12a may be coated so that the single crystal particles of the lattice matching layer 13 are partially exposed. The electrode protective layer 12a may be performed by a general electrode formation method. For example, the electrode protective layer 12a may be formed by a method such as a plasma enhanced chemical vapor deposition method (PECVD), an atomic layer deposition method (ALD), a sputtering method, a vacuum deposition method, or an ion plating method. .

Next, the electrode protection layer 12a may be etched to a predetermined thickness so as to have a thickness smaller than the height of the lattice matching layer 13, as shown in FIG. 5C. The electrode protection layer 12a may be maintained at a predetermined thickness necessary to protect the electrode layer 12 positioned below. In the lattice matching layer 13, single crystal particles protrude to a predetermined height above the electrode protective layer 12a. The lattice matching layer 13 acts as a crystal nucleus during the deposition process of the buffer layer 14 formed on the upper surface of the electrode protection layer 12a.

Next, a micro LED according to an embodiment of the present invention will be described.

6 is a perspective view of a micro LED according to an embodiment of the present invention.

Referring to FIG. 6, the micro LED 100 according to an embodiment of the present invention includes a transparent substrate 110, a first electrode 120, a lattice matching layer 130, a buffer layer 140, and an LED cell 150. ) Can be included. In addition, the micro LED 100 may further include a second electrode 160. In addition, the micro LED 100 may further include an electrode protective layer 125. The LED cell 150 may include a first semiconductor layer 151, an active layer 152, and a second semiconductor layer 153.

The micro LED 100 may be formed including the single crystal layer structure 10 according to FIG. 2A. In the following description, a case where the micro LED 100 includes the single crystal layer structure 10 according to FIG. 2A will be mainly described. In addition, for the same configuration as the single crystal layer structure 10 of the micro LED 100, the name of the corresponding component is referred to and a detailed description thereof is omitted.

The micro LED 100 may be separately manufactured and directly formed without being transferred onto the transparent substrate 110. More specifically, the micro LED 100 includes a first electrode 120, a lattice matching layer 130, a buffer layer 140, an LED cell 150, and a second electrode 160 on the transparent substrate 110. ) Can be directly formed sequentially.

The micro LED 100 may be a micro LED 100 emitting any one of R, G, or B. In addition, the micro LED 100 may be a micro LED 100 emitting white light. A plurality of the micro LEDs 100 may be arranged in various shapes such as a linear shape, a lattice shape, or a honeycomb shape to be formed as a micro LED 100 module.

The micro LED 100 is capable of highly directional emission through lower light emission. In addition, since the micro LED 100 can improve LED efficiency, excellent light extraction efficiency and current injection efficiency are improved. In addition, the micro LED 100 can realize a clear and bright screen by improving the aperture ratio of pixels for an active matrix. In addition, in the micro LED 100, the light emitting portion may be greatly increased due to an increased electrode formation area.

The transparent substrate 110 may be formed in the same manner as the transparent substrate 11 of the single crystal layer structure 10 according to FIG. 2A. The first electrode 120 may be formed in the same manner as the electrode layer 12 of the single crystal layer structure 10 according to FIG. 2A. The electrode protective layer 125 may be formed in the same manner as the electrode protective layer of the single crystal layer structure 10 according to FIG. 2A. The lattice matching layer 130 may be formed in the same manner as the lattice matching layer 13 of the single crystal layer structure 10 according to FIG. 2A. The buffer layer 140 may be formed in the same manner as the buffer layer 140 of the single crystal layer structure 10 according to FIG. 2.

The LED cell 150 may be formed as a general LED cell including a semiconductor layer. For example, the LED cell 150 may include a first semiconductor layer 151, an active layer 152, and a second semiconductor layer 153, as mentioned above. In addition, the LED cell 150 is added between the first semiconductor layer 151 and the active layer 152, between the active layer 152 and the second semiconductor layer 153, or on the upper surface of the second semiconductor layer 153 Layers can be formed. The LED cell 150 may be formed on the upper surface of the lattice matching layer 130. The LED cell 150 may be formed by stacking a first semiconductor layer 151-an active layer 152-a second semiconductor layer 153 from the bottom. In addition, the LED cell 150 may be formed by stacking the second semiconductor layer 153-the active layer 152-the first semiconductor layer 151 from the bottom.

The first semiconductor layer 151 may be formed in the same manner as the single crystal layer 15 forming the single crystal layer structure 10 of FIG. 2.

The active layer 152 may be formed of an active layer 152 formed on a general micro LED. The active layer 152 may be formed of various materials according to R, G, and B that the corresponding micro LED 100 emits light. The active layer 152 may have a single quantum well structure or a multiple-quantum well (MQW) structure. The active layer 152 may include In _x Al _y Ga, InGaN, or In _x Ga _1-X N/GaN. The active layer 152 may be formed to emit red (R), green (G), and blue (B) emission wavelengths through a composition change of indium.

The second semiconductor layer 153 may be formed of a p-type nitride-based semiconductor layer. The second semiconductor layer 153 may be formed of a p-GaN layer. The second semiconductor layer 153 may be formed by doping a single crystal of GaN with a p-type dopant such as Al, Mg, Zn, Ca, Sr, or Ba. Meanwhile, the second semiconductor layer 153 may be formed of various p-type semiconductor layers. The second semiconductor layer 153 may have an AFM roughness of 3 nm or less. The second semiconductor layer 153 may be formed into a film having a predetermined thickness by an MOCVD process.

Meanwhile, when the second semiconductor layer 153 is formed on the upper surface of the lattice matching layer 130, the second semiconductor layer 153 may be formed on the upper surface of the buffer layer 140. Accordingly, the second semiconductor layer 153 may have a single crystal structure having the same or similar lattice constant and thermal expansion coefficient as the GaN crystal.

The second 　 electrode 160 is at least any selected from Ni, Au, Mr, Cr, Co, Cu, Rb, Ru, Rh, Pd, Ag, Sn, W, Ir, Pt, La, Ce, Na and Eu It may be formed of a metal material or an alloy material including one. The second electrode 160 may be formed of a metal material having reflective properties that can increase luminous efficiency by reflecting light generated from the active layer 152 and emitting only toward the first electrode 120, which is a transparent electrode. .

Meanwhile, the micro LED according to another embodiment of the present invention may be formed including the single crystal layer structure 10 shown in FIG. 3, although not specifically shown. That is, in the micro LED, the electrode protection layer 125 may be formed after the lattice matching layer 130 is formed on the upper surface of the first electrode 120. In this case, the single crystal particles of the lattice matching layer 130 may be partially exposed to the top of the electrode protection layer 125. Accordingly, at least a portion of the single crystal particles are exposed to the top of the electrode protective layer 125. However, detailed descriptions and drawings for the case where the micro LED is formed including the single crystal structure 10 according to FIG. 3 are omitted.

Next, a method of manufacturing a micro LED module according to an embodiment of the present invention will be described.

7 is a flowchart of a method for manufacturing a micro LED according to an embodiment of the present invention. 8 is a perspective view of a micro LED module manufactured by the method of manufacturing the micro LED module of FIG. 7.

In the method of manufacturing a micro LED module according to an embodiment of the present invention, referring to FIG. 7, a first electrode forming step (S110), an electrode protective layer forming step (S120), a lattice matching layer forming step (S130), and , A buffer layer forming step (S140), an LED layer forming step (S150), and a second electrode forming step (S170). In addition, the method of manufacturing the micro LED module may further include a patterning step (S160).

A method of manufacturing a micro LED module according to an embodiment of the present invention is a method of manufacturing a micro LED module 200 in which the micro LED 100 of FIG. 6 or a plurality of micro LEDs 100 are arranged. The method of manufacturing the micro LED module may be performed using the method of manufacturing a single crystal layer structure according to FIG. 4. Therefore, in the following description, for the same steps as those of the method for manufacturing a single crystal layer structure in the method for manufacturing the micro LED module, the name of the corresponding step is referred to, and detailed descriptions are omitted. Meanwhile, the method of manufacturing the micro LED module may be applied mutatis mutandis to the method of manufacturing a micro LED including the single crystal layer structure 10 according to FIG. 3.

The method of manufacturing a micro LED module can be applied to manufacture a micro LED module comprising a plurality of micro LEDs 100 emitting light of a single wavelength. For example, the micro LED module manufacturing method may manufacture a micro LED module emitting any one of R, G, or B. In addition, the micro LED module manufacturing method may manufacture a micro LED module emitting white light. The method of manufacturing a micro LED module may form a micro LED module in which a plurality of micro LEDs 100 arranged to be spaced apart from each other are arranged on a substrate by patterning a plurality of stacked layers. In the method of manufacturing the micro LED module, the first electrode 120 is patterned while being etched to expose the micro LED module 200 including a plurality of micro LEDs 100. Accordingly, the micro LED module 200 may be formed by arranging a plurality of micro LEDs 100 in a grid shape, as shown in FIG. 8. In addition, the micro LED module 200 may be formed by arranging the micro LED 100 in various shapes such as a radial arrangement, a spiral arrangement or a linear arrangement.

In the method of manufacturing the micro LED module, an electrode protective layer 125, a lattice matching layer 130, and a buffer layer 140 are formed on the first electrode 120, and the first semiconductor layer 151 and the active layer 152 are formed thereon. ) And the second semiconductor layer 153 are formed and patterned, so that the micro LED module 200 may be directly formed on the transparent substrate 110. That is, the method of manufacturing the micro LED module uses the lattice matching layer 130 formed of a material having the same or very similar lattice constant and thermal expansion coefficient to GaN, which is a material forming the first semiconductor layer 151, so that the transparent substrate 110 The micro LED module 200 may be directly formed on the top of ).

The method of manufacturing the micro LED module is a non-transfer process, and the micro LED module 200 is formed by a direct deposition method using the lattice matching layer 130. The micro LED manufacturing method uses the lattice matching layer 130 to solve the problem of lattice mismatching due to the difference in lattice constant and thermal expansion coefficient between the first electrode 120 and the first semiconductor layer 151. Solve. Accordingly, the method of manufacturing the micro LED module can increase the yield of the micro LED module 200 by a defect-free process in which defects are not generated according to the existing transfer process. In addition, the method of manufacturing a micro LED module enables the manufacture of a monolithic micro LED module 200, thereby ensuring a high yield and fast processing time.

In the method of manufacturing the micro LED module, the micro LED module 200 may be formed by arranging a plurality of driving panels and light emitting pixels on a single substrate while using an existing semiconductor process as it is. Accordingly, the method of manufacturing the micro LED module can solve problems such as a complicated transfer process, a yield, and a high manufacturing cost, which have been the biggest obstacles to commercialization of the micro LED module 200. In addition, in the method of manufacturing the micro LED module, the micro LED module 200 can be directly grown on a backplane substrate in which a driving panel and a driving circuit are integrated, and a high yield can be secured.

The first electrode forming step S110 may be performed in the same manner as the electrode layer forming step S10 of FIG. 4. The first electrode 120 may be formed entirely in a region where the LED cell 150 is formed on the upper surface of the transparent substrate 110. The first electrode 120 may be formed in an area corresponding to the planar area of the plurality of LED cells 150 to be formed.

The electrode protective layer forming step S120 may be performed in the same manner as the electrode protective layer forming step S20 according to FIG. 4. The electrode protection layer 125 may be entirely formed on the upper surface of the first electrode 120. The electrode protection layer 125 may be formed in the same area as the first electrode 120.

The step of forming a grid matching layer (S130) may be performed in the same manner as the step of forming a grid matching layer (S30) according to FIG. 4. The lattice matching layer 130 may be entirely formed on the upper surface of the electrode protection layer 125. The lattice matching layer 130 may be formed in the same region as the first electrode 120.

The forming of the buffer layer (S140) may be performed in the same manner as the forming of the buffer layer (S40) of FIG. 4. The buffer layer 140 may be formed entirely on the upper surface of the lattice matching layer 130. The buffer layer 140 may be formed in the same area as the first electrode 120.

The forming of the LED layer (S150) is a step of forming an LED layer on the buffer layer 140. Here, the LED layer refers to a layer in which the first semiconductor layer 151, the active layer 152, and the second semiconductor layer 153 constituting the LED cell 150 are sequentially stacked. The LED layer forming step S150 may include a first semiconductor layer forming step S151, an active layer forming step S152, and a second semiconductor layer forming step S153. The step of forming the LED layer (S150) may be performed by a general LED layer forming method.

The first semiconductor layer forming process (S151) is a process of forming the first semiconductor layer 151 on the buffer layer 140. The first semiconductor layer forming process S151 may be performed in the same manner as the single crystal layer forming step S50 of FIG. 4. The first semiconductor layer 151 may be formed of an n-GaN layer. In the first semiconductor layer forming process (S151), a GaN single crystal layer 15 is formed, and an n-type dopant such as Si, Ge, Sn, Se, or Te is injected together to form the first semiconductor layer 151. I can. In addition, the first semiconductor layer 151 may be formed of a p-GaN layer. In the first semiconductor layer forming process (S151), a GaN single crystal layer 15 is formed, and a p-type dopant such as Al, Mg, Zn, Ca, Sr, or Ba is injected together to form the first semiconductor layer 151. Can be made to do. The process of forming the first semiconductor layer (S151) may be performed in the same manner as MOCVD.

The active layer forming process (S152) is a process of forming the active layer 152 on the upper surface of the first semiconductor layer 151. The active layer 152 may be formed of a material that emits energy generated by recombination of electrons and holes as light having a specific wavelength. The active layer 152 may be formed of a material emitting light having a required wavelength. The active layer 152 may have a single quantum dot structure or a multiple-quantum well (MQW) structure. For example, the active layer 152 may include In _x Al _y Ga, InGaN, or In _x Al _y Ga/GaN. The active layer forming process (S152) may be performed by an MOCVD method.

The second semiconductor layer forming process (S153) is a process of forming the second semiconductor layer 153 on the active layer 152. The second semiconductor layer 153 may be formed of a p-GaN layer. In the second semiconductor layer forming process (S153), a GaN single crystal layer 15 is formed, and a p-type dopant such as Al, Mg, Zn, Ca, Sr, or Ba is injected together to form the second semiconductor layer 153. Can be made to do. The second semiconductor layer forming process (S153) may be performed in the same manner as MOCVD. The second semiconductor layer 153 may be formed of an n-GaN layer. In the second semiconductor layer forming process (S153), a GaN single crystal layer 15 is formed, and an n-type dopant such as Si, Ge, Sn, Se, or Te is injected together to form the second semiconductor layer 153. I can.

In the patterning step (S160), a layer including an LED layer formed on the transparent substrate 110 is patterned to form a micro LED module 200 including a plurality of micro LEDs 100 spaced apart from each other. Step. The patterning step S160 may be performed by sequentially etching a layer including the second semiconductor layer 153, the active layer 152, and the first semiconductor layer 151 forming the LED layer. The patterning step S160 may be performed by a photo process and an etching process used in a conventional semiconductor process. The micro LED module 200 formed by the patterning step S160 may be formed by arranging a plurality of micro LEDs 100 emitting light of the same wavelength as shown in FIG. 8. In the patterning step S160, the micro LED 100 may be patterned according to a required arrangement. On the other hand, when the micro LEDs 100 are separately deposited and formed, the patterning step S160 may be omitted.

The second electrode forming step S170 is a step of forming the second electrode 160 on the micro LED 100. That is, in the forming of the second electrode (S170 ), the second electrode 160 may be formed on the upper surface of the second semiconductor layer 153 of each micro LED 100. The second electrode forming step (S170) may be performed in the same or similar step as the first electrode forming step (S110).

Next, a method of manufacturing a micro LED module according to another embodiment of the present invention will be described.

9 is a flowchart of a method of manufacturing a micro LED module according to an embodiment of the present invention. 10 is a partial perspective view of a micro LED module manufactured by the method of manufacturing the micro LED module of FIG. 9.

The micro LED module manufacturing method, referring to FIG. 9, includes forming a first LED layer (S210), forming a first micro LED (S220), forming a first mask layer (S230), and forming a second LED pattern. (S240), forming a second micro-LED (S250), forming a second mask layer (S260), forming a third LED pattern (S270), forming a third micro-LED (S280), and removing a mask layer (S290) ) And forming a second electrode (S300).

The method of manufacturing a micro LED module includes forming a micro LED module 200 including a plurality of micro LEDs 100 each emitting red (R), green (G) and blue (B) wavelengths on one substrate. I can. That is, as shown in FIG. 10, the micro LED module 200 emits red (R), green (G), and blue (B) wavelengths, respectively, located on the upper surface of the substrate, as shown in FIG. 10. 100c) may be included in at least one. The micro LED module 200 may form a pixel including an R pixel, a G pixel, and a B pixel. Here, the first micro-LED 100a may form an R pixel, the second micro-LED 100b may form a G pixel, and the third micro-LED 100c may form a B pixel. The micro LED module 200 may be formed by arranging a first micro LED 100a, a second micro LED 100b, and a third micro LED 100c in a straight line as shown in FIG. 10. In addition, the micro LED module 200 may be formed by arranging a first micro LED 100a, a second micro LED 100b, and a third micro LED 100c in a lattice shape. The substrate is not specifically shown, but the first LED area, the second LED area, and the third LED area in which the first micro LED 100a, the second micro LED 100b, and the third micro LED 100c are formed. It can be provided. The method of manufacturing a micro LED module may be applied to manufacturing a flat panel display device using a plurality of micro LED modules 200 formed on a substrate. For example, in the method of manufacturing the micro LED module, after directly growing layers constituting the micro LED on a driving TFT backplane substrate, the micro LED module 200 is used by using an etching process such as a conventional photolithography process. Can be formed. In addition, in the method of manufacturing the micro LED module, a plurality of micro LED modules 200 may be finally formed on one transparent substrate 110 for a display.

Hereinafter, in the method of manufacturing the micro LED module, first, the first micro LED 100 (R pixel) is formed, and the second micro LED 100 (G pixel) and the third micro LED 100 (B pixel) are sequentially formed. It will be described in the order of formation. In addition, in the method of manufacturing the micro LED module, the order of formation of R, G, and B pixels may be different.

The forming of the first LED layer (S210) is a step of sequentially forming a lattice matching layer 130, a buffer layer 140, and a first LED layer over the substrate. The first LED layer forming step S210 may include a lattice matching layer forming step S130, a buffer layer forming step S140, and an LED layer forming step S150 of the method of manufacturing the micro LED module of FIG. 7. In addition, the step of forming the first LED layer (S210) may be performed by the method of manufacturing the micro LED module of FIG. Accordingly, in the step of forming the first LED layer (S210), the first electrode 120, the lattice matching layer 130, the buffer layer 140, and the LED layer may be sequentially formed on the substrate. Here, the first LED layer may include a first semiconductor layer 151, a first active layer 152 and a second semiconductor layer 153. The first active layer 152 may be formed of a material as an R emission active layer. That is, the first active layer 152 may be formed of a material emitting red wavelength light.

The first micro-LED forming step S220 is a step of forming a plurality of first micro-LEDs 100 by patterning the first LED layer. The first micro-LED forming step (S220) may be performed in the same or similar to the patterning step (S160) of the method of manufacturing the micro-LED module of FIG. 7. A plurality of first micro LEDs 100 may be formed on the substrate by the first micro LED forming step S220. The micro LED 100 may have a circular shape, a square shape, or a hexagonal shape. In the first micro-LED forming step S220, the first semiconductor layer 151 of the first LED layer or the first active layer may be patterned. The first micro LED forming step S220 may be performed such that the first semiconductor layer 151 is exposed by patterning the first active layer 152. At least one first micro LED 100 may be formed for each micro LED module 200.

The forming of the first mask layer (S230) is a step of forming a first mask layer entirely on a region including the upper surface of the second semiconductor layer 153 of the first micro LED 100. The first mask layer may be formed of a material capable of suppressing growth of a single crystal of GaN such as SiO ₂ or SiN.

The second LED pattern forming step S240 is a step of forming a second LED pattern by etching a first mask layer in a region corresponding to a second LED region in which the second micro LED 100 is formed on the substrate. . In the forming of the second LED pattern (S240), a second LED pattern is formed in a second LED area on the substrate. The second LED area refers to an area in which the second micro LED 100 is formed on the substrate. The second LED pattern may be formed in a groove shape having a predetermined depth. In addition, the second LED pattern may be formed in a planar shape corresponding to the planar shape of the second micro LED 100 to be formed. For example, the second LED pattern may be formed in a circular shape, a square shape, or a hexagonal shape. In the step S240 of forming the second LED pattern, the first semiconductor layer 151 may be exposed in the second LED area. Meanwhile, in the step S240 of forming the second LED pattern, if necessary, the first semiconductor layer 151 may be etched to expose the buffer layer 140. Hereinafter, a case in which the second LED pattern forming step S240 is performed to expose the first semiconductor layer 151 will be described. The second LED pattern may be formed on a region corresponding to a second LED region in which the second micro LED 100 is formed on the substrate. The step of forming the second LED pattern (S240) is performed in the same process as the dry etching process.

In the forming of the second micro LED (S250), a second active layer 152 and a second semiconductor layer 153 are formed on the upper surface of the first semiconductor layer 151 inside the second LED pattern to form a second micro LED ( 100) is formed. The second active layer 152 may be formed including the G light-emitting active layer 152. Accordingly, the second active layer 152 may be formed of a material emitting green wavelength light. At least one second micro LED 100 may be formed for each micro LED module 200. The second micro LEDs 100 are formed adjacent to the first micro LEDs 100 in each micro LED module 200, and may be formed in the same number as the first micro LEDs 100.

The forming of the second mask layer (S260) is a step of forming a second mask layer in a region including an upper surface of the second semiconductor layer 153 of the second micro LED 100. The second mask layer may be formed on an upper surface of the first mask layer of the first micro LED 100. That is, the second mask layer may also be formed on an upper surface of the first mask layer formed on the second semiconductor layer 153 of the first micro LED 100. The second mask layer may be formed in the same manner as the first mask layer. The second mask layer may be formed of a material capable of suppressing the growth of a GaN single crystal such as SiO ₂ or SiN.

In the step of forming the third LED pattern (S270), a third LED pattern having a groove shape is formed by etching a second mask layer in an area corresponding to the third LED area in which the third micro LED 100 is formed on the substrate. This is the step. The third LED region refers to a region in which the third micro LED 100 is formed on the substrate. In the step of forming the third LED pattern (S270), a third LED pattern is formed in the third LED area above the substrate. The third LED pattern may be formed in the same shape as the second LED pattern. That is, the third LED pattern may be formed in a groove shape having a predetermined depth. In addition, the third LED pattern may be formed in a planar shape corresponding to the planar shape of the third micro LED 100 to be formed. For example, the third LED pattern may be formed in a circular shape, a square shape, or a hexagonal shape. In the step S270 of forming the third LED pattern, the first semiconductor layer 151 may be exposed in the third LED area. Meanwhile, the third LED pattern forming step S270 may also be performed so that the first semiconductor layer 151 or layers positioned under the first semiconductor layer 151 are etched, similarly to the second LED pattern forming step S240. The third LED pattern may be formed in a region corresponding to a second LED region in which the third micro LED 100 is formed. At least one third LED pattern may be formed on each micro LED module 200. The third LED area is an area in which the third micro LED 100 is formed. The third LED area is an area where B pixels are formed. The third pattern formation step is performed in the same process as the dry etching process. The dry etching process may be an ICP process or an RIE process. In addition, various etching processes used in semiconductor processes may be applied to the third pattern forming step.

In the forming of the third micro LED (S280), a third active layer 152 and a second semiconductor layer 153 are formed on the upper surface of the first semiconductor layer 151 inside the third LED pattern to form a third micro LED ( 100) is formed. The third active layer 152 may be formed including a B light-emitting active layer 152. Accordingly, the third active layer 152 may be formed of a material that emits blue wavelength light. At least one of the third micro LEDs 100 may be formed for each micro LED module 200. The third micro LED 100 is formed adjacent to the first micro LED 100 and the second micro LED 100 in each micro LED module 200, and the first micro LED 100 and the second micro LED 100 It may be formed in the same number as the LED (100).

The removing of the mask layer (S290) is a step of removing the mask layer on the top of the first micro LED 100 and the second micro LED 100. In the mask layer removing step S290, the first mask layer and the second mask layer may be simultaneously removed. The mask layer may include a first mask layer and a second mask layer. Meanwhile, in the mask layer removing step (S290), the second active layer 152, the third active layer 152, and the second semiconductor layer 153, which are positioned above the mask layer, may be removed together.

In the forming of the second electrode (S300), the second electrode 160 is formed on the upper surface of the second semiconductor layer 153 of the first micro LED 100, the second micro LED 100, and the third micro LED 100. ) Is formed. The second electrode 160 may be formed on an upper surface of the second semiconductor layer 153 of the first micro LED 100, the second micro LED 100, and the third micro LED 100, respectively.

The micro LED module manufacturing method may freely control the size and pixel resolution of the display device by adjusting the size and spacing of the micro LED module 200. In addition, the size and pixel resolution of the display device may be set by adjusting the number of first, second, and third pixels formed in the micro LED module 200. The manufacturing method of the micro LED module can be applied to the production of a 100-inch or larger ultra-large display, a TV display, a smart watch, and a display for mobile, AR, VR, and MR devices. In addition, in the method of manufacturing the micro LED module, a display driving TFT may be sequentially formed in each of the R, G, and B pixel regions.

So far, the present invention has been looked at in detail centering on the preferred embodiments shown in the drawings. These embodiments are not intended to limit the present invention, but are merely illustrative, and should be considered from an illustrative point of view rather than a restrictive point of view. The true technical protection scope of the present invention should be determined not by the above description but by the technical spirit of the appended claims.

10: single crystal layer structure
11: transparent substrate 12: electrode layer
13: lattice matching layer 13a: single crystal grains
14: buffer layer 15: single crystal layer
100: micro LED
110: transparent substrate 120: first electrode
125: electrode protective layer 130: lattice matching layer
140: buffer layer 150: LED cell
151: first semiconductor layer 152: active layer
153: second semiconductor layer 160: second electrode
200: micro LED module

Claims (18)

A transparent substrate,
A transparent electrode layer formed on the substrate,
A lattice matching layer formed on the electrode layer,
A buffer layer deposited using the lattice matching layer as a crystal nucleus, and
It includes a single crystal layer formed on the upper surface of the buffer layer,
The lattice matching layer is a single crystal layer structure, characterized in that formed of a material having the same or similar lattice constant as the buffer layer and the single crystal layer. The method of claim 1,
The lattice matching layer is formed by dispersing single crystal particles on the upper surface of the electrode layer or is formed in the form of a thin film,
The buffer layer is a single crystal layer structure, characterized in that formed in the form of a thin film on the upper surface of the lattice matching layer. The method of claim 1,
The single crystal layer structure further includes an electrode protective layer formed on the upper surface of the electrode layer,
The lattice matching layer is formed by dispersing single crystal particles on the upper surface of the electrode protective layer or is formed in the form of a thin film,
The buffer layer is a single crystal layer structure, characterized in that formed in the form of a thin film on the upper surface of the lattice matching layer including the electrode protective layer. The method of claim 1,
The single crystal layer is formed of an n-type semiconductor layer or p-type semiconductor layer including GaN,
The lattice matching layer is among sapphire, AlGaN, InGaN, GaN, CrN, MgAl ₂ O ₄ , Gd ₂ O ₃ , Ga ₂ O ₃ , SiC, TiN, AlN, Si, ZnO, MgO, CdO, MgZnO, CdZnO and BN. A single crystal layer structure comprising at least one selected. An electrode layer forming step of forming an electrode layer on the upper surface of the substrate,
A lattice matching layer forming step of forming a lattice matching layer on top of the electrode layer,
A buffer layer forming step of depositing a buffer layer using the lattice matching layer as a crystal nucleus on the electrode layer, and
A single crystal layer forming step of forming a single crystal layer on the upper surface of the buffer layer,
The lattice matching layer is a single crystal layer structure manufacturing method, characterized in that formed of a material having the same or similar lattice constant as the buffer layer and the single crystal layer. The method of claim 5,
The step of forming the lattice matching layer comprises a sputtering process, a sol-gel process, or a particle dispersion process. The method of claim 5,
The step of forming the buffer layer is performed by a MOCVD process conducted in a process temperature range of 400 to 600°C,
The step of forming the single crystal layer is a method of manufacturing a single crystal layer structure, characterized in that the MOCVD process is performed at a process temperature range of 1,000 ^o C or higher. The method of claim 5,
The method of manufacturing the single crystal layer structure further includes an electrode protective layer forming step of forming an electrode protective layer on the electrode layer,
The lattice matching layer is a single crystal layer structure manufacturing method, characterized in that formed on the upper surface of the electrode protection layer. A transparent substrate,
A first transparent electrode formed on the substrate,
A lattice matching layer formed on the electrode layer,
A buffer layer deposited using the lattice matching layer as a crystal nucleus,
A first semiconductor layer formed on the upper surface of the buffer layer,
An active layer formed on the upper surface of the first semiconductor layer,
A second semiconductor layer formed on the upper surface of the active layer, and
Micro LED comprising a second electrode formed on the upper surface of the second semiconductor layer. The method of claim 9,
The lattice matching layer is formed by dispersing single crystal particles on the upper surface of the first electrode or is formed in the form of a thin film,
The buffer layer is a micro LED, characterized in that formed in the form of a thin film in a region including between the single crystal grains on the upper surface of the first electrode. The method of claim 9,
The single crystal layer structure further includes an electrode protective layer formed on an upper surface of the first electrode,
The lattice matching layer is formed by dispersing single crystal particles on the upper surface of the electrode protective layer or is formed in the form of a thin film,
The buffer layer is a micro LED, characterized in that formed in the form of a thin film in a region including between the single crystal particles on the upper surface of the electrode protective layer. The method of claim 9,
The single crystal layer is formed of an n-type semiconductor layer or p-type semiconductor layer including GaN,
The lattice matching layer is among sapphire, AlGaN, InGaN, GaN, CrN, MgAl ₂ O ₄ , Gd ₂ O ₃ , Ga ₂ O ₃ , SiC, TiN, AlN, Si, ZnO, MgO, CdO, MgZnO, CdZnO and BN. Micro LED comprising at least one selected. A first electrode forming step of forming a first electrode on the upper surface of the substrate,
A lattice matching layer forming step of forming a lattice matching layer over the first electrode,
A buffer layer forming step of depositing a buffer layer on top of the first electrode using the lattice matching layer as a crystal nucleus,
Forming a first semiconductor layer on the upper surface of the buffer layer, forming an active layer on the upper surface of the first semiconductor layer, and forming a second semiconductor layer on the upper surface of the active layer; and
A second electrode forming step of forming a second electrode on an upper surface of the second semiconductor layer,
The lattice matching layer is formed of a material having the same or similar lattice constant as the buffer layer and the first semiconductor layer. The method of claim 13,
The step of forming the lattice matching layer comprises a sputtering process, a sol-gel process, or a particle dispersion process. The method of claim 13,
The micro LED manufacturing method further includes forming an electrode protective layer on the first electrode, forming an electrode protective layer,
The lattice matching layer is a method of manufacturing a micro LED module, characterized in that formed on the upper surface of the electrode protection layer. The method of claim 13,
Further comprising a patterning step of patterning a layer including the active layer and the second semiconductor layer of the LED cell to form a micro LED module including a plurality of micro LEDs,
The patterning step comprises patterning a layer including at least the active layer and the second semiconductor layer from an upper portion. Forming a first LED layer forming a first LED layer including a lattice matching layer, a buffer layer, a first semiconductor layer, a first active layer, and a second semiconductor layer on the upper surface of the substrate by the method of manufacturing the micro LED module according to claim 13 Step and,
A step of forming a first micro LED by patterning the first LED layer to form a first micro LED,
A first mask layer forming step of forming a first mask layer in a region including an upper surface of the second semiconductor layer of the first micro LED,
A second LED pattern forming step of forming a second LED pattern by etching a first mask layer in an area corresponding to the second LED area on the substrate,
Forming a second micro LED by forming a second active layer and the second semiconductor layer on an upper surface of the first semiconductor layer inside the second LED pattern, and
A second mask layer forming step of forming a second mask layer in a region including an upper surface of the second semiconductor of the second microLED,
A second LED pattern forming step of forming a third LED pattern by etching the second mask layer in an area corresponding to the third LED area on the substrate,
Forming a third micro LED by forming a third active layer and the second semiconductor layer on an upper surface of the first semiconductor layer inside the third LED pattern; and
A mask layer removing step of removing the mask layer positioned on the first micro LED and the second micro LED, and
And a second electrode forming step of forming a second electrode on an upper surface of the second semiconductor layer of the first micro LED, the second micro LED, and the third micro LED, respectively. At least one R pixel formed of the micro LED according to any one of claims 9 to 12 and emitting a red wavelength,
At least one G pixel formed of the micro LED according to any one of claims 9 to 12 and emitting a green wavelength, and
A micro LED module formed of the micro LED according to any one of claims 9 to 12 and comprising at least one B pixel emitting a blue wavelength.

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