KR20200082320A - Organic lightemitting display and driving method for the same - Google Patents

Abstract

Embodiments of the present invention includes: a display panel including a plurality of pixels; a drive circuit that generates a data signal in response to an image signal and supplies a data signal to the plurality of pixels; a timing controller that supplies the image signal to the drive circuit; and a power supply unit for supplying a first power supply and a second power supply having a lower voltage level than the first power supply to the display panel, wherein the power supply unit senses threshold voltages of a plurality of pixels in a first period, receives the generated image signal in response to a threshold voltage in a second period, generates a data signal, and supplies the data signal to the plurality of pixels; the plurality of pixels receive the data signal and a first reference voltage and generate a driving current in response to the data signal and the first reference voltage; the drive circuit generates the data signal in response to a first gray voltage and a second gray voltage; and the voltage level of the first gray voltage is varied in response to the threshold voltage sensed during the first period.

Description

Organic light emitting display device and its driving method {ORGANIC LIGHTEMITTING DISPLAY AND DRIVING METHOD FOR THE SAME}

Embodiments of the present invention relates to an organic light emitting display device and a driving method thereof.

As the information society develops, demands for display devices for displaying images are increasing in various forms, and liquid crystal display devices (LCDs), plasma display devices (PDPs), and organic light emitting displays ( Various types of display devices such as OLED: Organic Light Emitting Display Device) are used. Among them, the organic light-emitting display device displays an image using an organic light-emitting diode, which is a self-light emitting device, and thus has an advantage in that thinning is easy, and viewing angle and contrast ratio are excellent.

In the organic light emitting display device, a difference in size of a driving current flowing through a plurality of pixels may occur due to variation in characteristics of the pixels, which may cause deterioration in image quality. Therefore, it is possible to improve the image quality by compensating for the characteristic variation of the pixel. However, in order to compensate for the characteristic deviation of the pixel, the characteristic deviation is sensed, and if sensing is not efficient, the image quality may not improve.

Recently, there has been an effort to reduce power consumption of the display device in order to increase the use time or environmental problems. In addition, the display device has a problem in that power consumption increases when the voltage level of the power sources provided for driving is high. Therefore, it is necessary to lower the voltage level of the power sources provided for driving the display device.

An object of the embodiments of the present invention is to provide an organic light emitting display device capable of improving image quality and a driving method thereof.

In addition, another object of embodiments of the present invention is to provide an organic light emitting display device capable of reducing power consumption and a driving method thereof.

In one aspect, embodiments of the present invention, a display panel including a plurality of pixels, generates a data signal corresponding to the image signal, a drive circuit for supplying the data signal to the plurality of pixels, and supplying the image signal to the drive circuit It includes a timing controller, a power supply for supplying a first power supply to the display panel and a second power supply having a lower voltage level than the first power supply, sensing threshold voltages of a plurality of pixels in the first period, and threshold voltages in the second period. In response to receiving the generated image signal, the data signal is generated and supplied to a plurality of pixels, the plurality of pixels receives the data signal and the first reference voltage, and in the third period, the plurality of pixels are the data signal and the first A drive current is generated in response to the reference voltage, and the drive circuit generates a data signal corresponding to the first and second gradation voltages, but the voltage level of the first gradation voltage corresponds to the threshold voltage sensed in the first period. By providing a variable organic light emitting display device can be provided.

In another aspect, embodiments of the present invention provide a display panel including a plurality of pixels, a first gradation voltage having a lower voltage level than the first reference voltage, and a second gradation voltage having a higher voltage level than the first reference voltage. , P-gamma circuit that receives and receives the first gradation voltage information for the voltage level of the first gradation voltage to determine and supply the voltage level of the first reference voltage, and receives the first gradation voltage information of the plurality of pixels. It is possible to provide an organic light emitting display device including a timing controller for setting and a drive circuit for generating a data signal and supplying it to a plurality of pixels in response to the first grayscale voltage and the second grayscale voltage.

In another aspect, embodiments of the present invention, in a driving method of driving an organic light emitting display device including a plurality of pixels, sensing a threshold voltage of a plurality of pixels, a first grayscale voltage lower than a first reference voltage And generating a second gradation voltage higher than the first reference voltage, wherein the voltage level of the first gradation voltage is set corresponding to the threshold voltage, and driving the organic light emitting diode in response to the first gradation voltage and the second gradation voltage. It can provide a method of driving an organic light emitting display device comprising the step of.

According to embodiments of the present invention, an organic light emitting display device capable of improving image quality and a driving method thereof can be provided.

According to embodiments of the present invention, an organic light emitting display device capable of reducing power consumption and a driving method thereof can be provided.

1 is a structural diagram illustrating an organic light emitting display device according to embodiments of the present invention.
FIG. 2 is a plan view illustrating an embodiment of the display panel shown in FIG. 1.
3 is a circuit diagram illustrating an exemplary embodiment of the pixel illustrated in FIG. 1.
4 is a graph showing the distribution of the threshold voltage of the pixel illustrated in FIG. 3.
5 is a waveform diagram illustrating an embodiment of signals input during a driving period in which the organic light emitting diode emits light in the pixel illustrated in FIG. 3.
6 is a structural diagram illustrating an embodiment of the drive circuit shown in FIG. 1.
7 is a circuit diagram illustrating an embodiment of the digital-to-analog converter shown in FIG. 6.
8 is a structural diagram illustrating an embodiment of an analog-to-digital converter and an operation unit connected to the pixel illustrated in FIG. 6.
9 is a circuit diagram illustrating an embodiment of the operation unit shown in FIG. 8.
10 is a timing diagram showing the operation of the operation unit in the sensing period.
11 is a structural diagram showing an embodiment of the configuration of the timing controller and the power supply unit shown in FIG. 1.
12 is a conceptual diagram for comparing voltage levels of data signals.
13 is a graph showing a voltage level of a data signal according to usage time in an organic light emitting display device according to embodiments of the present invention.
14 is a flowchart illustrating a method of driving an organic light emitting display device according to an exemplary embodiment of the present invention.

Advantages and features of the present invention, and methods for achieving them will be clarified with reference to embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the present embodiments allow the disclosure of the present invention to be complete, and common knowledge in the art to which the present invention pertains. It is provided to fully inform the holder of the scope of the invention, and the invention is only defined by the scope of the claims.

In addition, the shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary, and the present invention is not limited to the illustrated matters. The same reference numerals refer to the same components throughout the specification. In addition, in the description of the present invention, when it is determined that detailed descriptions of related known technologies may unnecessarily obscure the subject matter of the present invention, detailed descriptions thereof will be omitted. When'include','have','consist of', etc. mentioned in this specification are used, other parts may be added unless'~man' is used. When a component is expressed in singular, it may include a case in which plural is included unless specifically stated.

In addition, in interpreting the components in the embodiments of the present invention, it should be interpreted as including an error range even if there is no explicit description.

In addition, in describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are only for distinguishing the component from other components, and the nature, order, order, or number of the component is not limited by the term. When a component is described as being "connected", "coupled" or "connected" to another component, the component may be directly connected to or connected to the other component, but different components between each component It should be understood that the "intervenes" may be, or each component may be "connected", "coupled" or "connected" through other components. In the case of the description of the positional relationship, for example, when the positional relationship of two parts is described as'~top','~upper','~bottom','~side', etc.,'right' Alternatively, one or more other parts may be located between the two parts unless'direct' is used.

In addition, components in the embodiments of the present invention are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

In addition, the features (configurations) in the embodiments of the present invention may be partially or wholly combined with each other or combined or separated, and technically various interlocking and driving are possible, and each embodiment is independently performed with respect to each other. It may be possible or it may be implemented together in an association relationship.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a structural diagram showing an organic light emitting display device according to embodiments of the present invention, and FIG. 2 is a plan view showing an embodiment of the display panel shown in FIG. 1.

1 and 2, the organic light emitting display device 100 may include a display panel 110, a drive circuit 120, a timing controller 130 and a power supply unit 140.

The display panel 110 may be arranged such that a plurality of gate lines GL1,…,GLn and a plurality of data lines DL1,…,DLm intersect. In addition, the plurality of pixels 101 may be formed to correspond to an area where the plurality of gate lines GL1, ..., GLn and the plurality of data lines DL1, ..., DLm intersect. The plurality of pixels 101 may respectively emit red, green, blue, or white light. However, the color of light emitted by the pixel 101 is not limited thereto. The wiring arranged on the display panel 110 is not limited to the plurality of gate lines GL1, ..., and GLn and the plurality of data lines DL1, ..., DLm.

In addition, the display panel 110 may include a gate signal generation circuit 112 as shown in FIG. 2. The gate signal generation circuits 111a and 111b may be disposed on both sides of the display panel 110. The gate signal generation circuits 111a and 111b disposed on the left side of the display panel 110 may be referred to as the first gate signal generation circuit 111a and the gate signal generation circuits 111a and 111b disposed on the right side are removed. It can be referred to as a two-gate signal generation circuit 111b. The first gate signal generation circuit 111a may be connected to an odd-numbered gate line among the plurality of gate lines GL1, ..., GLn, and the second gate signal generation circuit 111b may be connected to an even-numbered gate line. However, it is not limited thereto.

The drive circuit 120 may apply a data signal to a plurality of data lines DL1, ..., DLm. The data signal may correspond to gradation, and the voltage level of the data signal may be determined according to the gradation. The voltage of the data signal may be referred to as a data voltage.

Here, the number of the drive circuits 120 is shown as one, but is not limited thereto, and may be two or more corresponding to the size and resolution of the display panel 110. Also, the drive circuit 120 may be implemented as an integrated circuit.

The timing controller 130 can control the drive circuit 120. Also, the timing controller 130 may transmit an image signal corresponding to the data signal to the drive circuit 120. The video signal may be a digital signal. The timing controller 130 may correct the image signal and transmit it to the drive circuit 120. The operation of the timing controller 130 is not limited to this. Further, the timing controller 130 may be implemented as an integrated circuit.

The power supply unit 140 may supply a first power supply (EVDD) and a second power supply (EVSS). The power supply unit 140 may receive the first power supply EVDD from the external set and provide it to the display panel 110. Also, the power supply unit 140 may determine and supply the voltage level of the second power supply EVSS. The power supply unit 140 may include a gate signal generation circuit and a level shifter that applies signals and/or voltages to the gate signal generation circuit. In addition, the power supply unit 140 may supply a driving voltage of the drive circuit 120 and may supply a gradation voltage corresponding to an image signal from the drive circuit 120. The gradation voltage includes a first gradation voltage and a second gradation voltage, the first gradation voltage having a voltage level lower than the first reference voltage, and the second gradation voltage having a voltage level higher than the first reference voltage. Can. Here, the voltage level of the first reference voltage may be 0V. However, it is not limited thereto. The difference between the voltage levels of the first gradation voltage and the second gradation voltage may be constant. Also, the voltage level of the first gradation voltage may not be a fixed voltage level. The portion that supplies the gradation voltage from the power supply unit 140 to the drive circuit 120 may be referred to as a P-gamma circuit.

The power supply unit 140 may include a level shifter (not shown) that applies signals and/or voltages to the gate signal generation circuits 111a and 111b.

3 is a circuit diagram illustrating an embodiment of the pixel illustrated in FIG. 1, and FIG. 4 is a graph showing the distribution of the threshold voltage of the pixel illustrated in FIG. 3.

Referring to FIGS. 3 and 4, the pixel may include an organic light emitting diode (OLED) and a pixel circuit driving the organic light emitting diode (OLED). The pixel circuit may include a first transistor M1, a second transistor M2, a third transistor M3, and a capacitor Cst.

The first transistor M1 has a first electrode connected to a first power line VL1 to which the first power EVDD is transmitted, a gate electrode connected to the first node N1, and a second node N2. Two electrodes can be connected. The first transistor M1 may cause a driving current to flow to the second node N2 in response to the voltage transmitted to the second node N1. The first electrode of the first transistor M1 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited thereto.

The current flowing through the second node N2 may correspond to Equation 1 below.

Here, Id means the amount of current flowing to the second node (N2), k means the electron mobility of the first transistor (M1), V _GS is the gate electrode and the source electrode of the first transistor (M1) Means a voltage difference, and Vth means a threshold voltage of the first transistor M1.

Therefore, since the amount of current varies according to the variation of the threshold voltage, it is possible to prevent the image quality from deteriorating by correcting the data signal in response to the variation in the threshold voltage.

The display panel 110 illustrated in FIG. 1 includes a plurality of pixels, and the distribution of the threshold voltage of each pixel 101 may appear as illustrated in FIG. 4. That is, the threshold voltages of the pixels 101 of the display panel 110 may have a negative voltage or a positive voltage.

The second transistor M2 may have a first electrode connected to the data line DL, a gate electrode connected to the gate line GL, and a second electrode connected to the second node N2. The second transistor M2 corresponds to a gate signal transmitted through the gate line GL, a data voltage Vdata corresponding to the data signal to the first node N1, or a sensing voltage Vsense corresponding to the sensing signal. Can be delivered. The first electrode of the second transistor M2 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited thereto.

The third transistor M3 has a first electrode connected to the second node N2, a gate electrode connected to the sensing control signal line SSL, and a second power line VL2 transmitting a first initialization voltage VPRER. To the second electrode may be connected. In addition, the second power line VL2 may be connected to the calculation unit 123 that calculates the amount of current flowing in the second power line VL2, and the second initialization voltage Vref_CL transmitted to the calculation unit 123 is controlled. It can be connected to 2 power lines (VL2). The third transistor M3 may transmit the first initialization voltage VPRER or the second initialization voltage Vref_CL to the second node N2 by the sensing control signal transmitted through the sensing control signal line SSL. The first initialization voltage VPRER initializes the second node N2 when the data voltage Vdata is applied to the data line DL, and the second initialization voltage Vref_CL senses the sensing voltage Vsense to the data line DL. ) Is applied, the second node N2 may be initialized. However, it is not limited thereto. The first initialization voltage VPRER may be applied to the second node N2 when the first switch PRER and the third transistor M3 are turned on. Then, the second initialization voltage Vref_CL may be applied to the second node N2 when the third transistor M3 is turned on.

Further, the information corresponding to the characteristic value of the pixel 101 may correspond to the voltage applied to the second node N2. Therefore, the characteristic value of the pixel 101 can be grasped using the voltage of the second node N2 and the data signal can be compensated. The characteristic value of the pixel 101 may be threshold voltage of the first transistor M1 and deterioration information of the organic light emitting diode OLED. However, it is not limited thereto. The first electrode of the third transistor M3 may be a drain electrode, and the second electrode may be a source electrode. However, it is not limited thereto.

The capacitor Cst may be connected between the first node N1 and the second node N2. The capacitor Cst may maintain the voltage of the gate electrode and the source electrode of the first transistor M1 constant.

In the organic light emitting diode OLED, the anode electrode may be connected to the second node N2 and the cathode electrode may be connected to the second power source EVSS. Here, the second power source EVSS may be a predetermined voltage. Also, the voltage level of the second power supply EVSS may be a voltage lower than 0V. However, it is not limited thereto. When the current flows from the anode electrode to the cathode electrode, the organic light emitting diode (OLED) may emit light corresponding to the amount of current. The organic light emitting diode (OLED) may emit any one of red, green, blue, and white colors. However, it is not limited thereto.

The pixel circuit of the pixel 101 employed in the organic light emitting display device 100 is not limited thereto.

Also, an analog-to-digital converter 120b may be connected to the pixel circuit. The analog-to-digital converter 120b may be connected to the second power line VL2. The analog-to-digital converter 120b may be connected through a second power line VL2 and a sampling switch SAMP. The analog-to-digital converter 120a may receive the voltage of the second node N2 through the second power line VL2 and convert it into a digital signal. When the sampling switch SAMP is turned on, the analog-to-digital converter 120a may receive the voltage level of the second power line VL2. The digital signal converted by the analog-to-digital converter 120a may be supplied to the timing controller 130. However, it is not limited thereto.

Here, the second node N2 is illustrated as being connected to the analog digital converter 120b through the operation unit 123 and the sampling switch SAMP, but is not limited thereto, and the analog digital converter 120b is the second node N2. When the threshold voltage is sensed using the voltage of the node N2, the configuration of the operation unit 123 may be excluded.

5 is a waveform diagram illustrating an embodiment of signals input during a driving period in which the organic light emitting diode emits light in the pixel illustrated in FIG. 2.

Referring to FIG. 5, the voltage level of the first initialization voltage VPRER transmitted to all the pixels 101 of the display panel 110 may be fixed to 0V. For example, the voltage level of the first initialization voltage VPRER supplied to one display panel 110 may be 0 V, but the voltage level of the first initialization voltage VPRER supplied to the other display panel 110 may be It can be 1V. The voltage level of the first initialization voltage VPRER described herein is exemplary and is not limited thereto, and may be a voltage lower than the threshold voltage of the organic light emitting diode OLED. However, the voltage level of the first initialization voltage VPRER may be a fixed voltage without being changed by the use time or life of the organic light emitting display device. Also, the second initialization voltage Vref_CL may not be transmitted to the second power line VL2. Also, the driving period Td may include a first driving period Td1 and a second driving period Td2.

In the first driving period TD, the gate signal GATE and the sensing control signal SENSE may be respectively supplied in a high state. Here, although the gate signal GATE and the sensing control signal SENSE are simultaneously shown as being supplied in a high state, the present invention is not limited thereto. When the gate signal GATE and the sensing control signal SENSE are supplied in a high state, the second transistor M2 and the third transistor M3 may be turned on. In addition, the first switch RPRE connected to the second power line VL2 may be turned on.

When the second transistor M2 is turned on, a data signal transmitted to the data line DL may be transmitted to the first node N1. The data signal may be a voltage at which the threshold voltage of the first transistor M1 is compensated. In addition, when the third transistor M3 and the first switch RPRE are turned on, the first initialization voltage VPRER may be transmitted to the second node N2. At this time, as described above, the voltage level of the first initialization voltage VPRER may be 0V. Therefore, the voltage level of the second node N2 becomes 0 V, so that a voltage lower than the threshold voltage of the organic light emitting diode OLED is transmitted to the anode electrode of the organic light emitting diode OLED, so that no current flows to the organic light emitting diode OLED. It can be done. In addition, since the third transistor M3 and the first switch PPRE connected to the second node N2 are turned on, the driving current generated in response to the data signal is the second node N2 and the third transistor M3. ), it may flow through the first switch (PPRE). Accordingly, the voltage of the first node N1 may maintain the voltage Vdata of the data signal.

In addition, the gate signal GATE and the sensing control signal SENSE may be supplied in a low state in the second driving period Td2. When the gate signal GATE and the sensing control signal SENSE are supplied in a low state, the second transistor M2 and the third transistor M3 may be turned off. Here, although the gate signal GATE and the sensing control signal SENSE are simultaneously shown as being supplied as a low signal, the present invention is not limited thereto.

When the second transistor M2 and the third transistor M3 are turned off in response to the gate signal GATE and the sensing control signal SENSE, the first electrode of the first transistor M1 is supplied to the second electrode. The voltage of the second node N2 may increase due to the driving current. The voltage of the second node N2 rises until it becomes higher than the threshold voltage of the organic light emitting diode OLED, and a driving current may flow through the organic light emitting diode OLED. At this time, since the voltage of the data signal is maintained at the first node N1 by the capacitor Cst, the driving current may flow in response to the data signal as described in Equation 1 above.

When the voltage Vdata of the data signal is supplied lower than the threshold voltage of the first transistor M1 in the pixel 101 driven as described above, the driving current does not flow through the first transistor M1, and the pixel 101 Black can be displayed. However, as illustrated in FIG. 3, the distribution of the threshold voltage of the first transistor M1 included in the pixel 101 disposed on the display panel 110 has both positive and negative voltages, and is specified. When the threshold voltage of the first transistor M1 of the pixel is a negative voltage, a specific pixel may display black when the voltage level of the first node N1 is supplied with a voltage lower than the threshold voltage. Therefore, in order for the pixel 101 to display in black, the voltage Vdata of the data signal must have a negative voltage. However, the present invention is not limited thereto, and even when a low gray level is displayed, a case in which the voltage Vdata of the data signal should be transmitted as a negative voltage may occur.

6 is a structural diagram illustrating an embodiment of the drive circuit shown in FIG. 1.

Referring to FIG. 6, the drive circuit 120 may include a digital-to-analog converter 120a and an analog-to-digital converter 120b. However, it is not limited thereto.

The digital-to-analog converter 120a may be connected to the data line DL. In addition, the digital-to-analog converter 120a may receive a video signal from the timing controller 130 to generate a data voltage Vdata corresponding to the data signal and supply it to the data line DL.

The analog-to-digital converter 120b may be connected to the second power line VL2. The analog-to-digital converter 120b may calculate the magnitude of the voltage level applied to the second power line VL2 and convert the output voltage level to a digital signal D.Sense to output it.

7 is a circuit diagram illustrating an embodiment of the digital-to-analog converter shown in FIG. 6.

Referring to FIG. 7, the digital-to-analog converter 120a may include a resistance string 121a in which a plurality of resistors R are connected in series. In addition, a first gray voltage (Gamma Min) and a second gray voltage (Gamma Max) may be transmitted to both ends of the resistance column 121a. The first gradation voltage (Gamma Min) and the second gradation voltage (Gamma Max) may be supplied from the P-gamma circuit 140a. In addition, an output terminal may be connected between the resistor R and the resistor R. Here, although the number of resistors R included in the resistance row 121a is shown to be six, it is not limited thereto. That is, the digital-to-analog converter 120a divides the voltage levels of the first gradation voltage (Gamma Min) and the second gradation voltage (Gamma Max) into seven data voltages Vdata0, Vdata1, Vdata2, Vdata3, Vdata4, Vdata5. ,Vdata6) can be output. The digital-to-analog converter 120a includes a switch (not shown) connected to the output terminal and selects a switch to convert one of the seven data voltages (Vdata0, Vdata1, Vdata2, Vdata3, Vdata4, Vdata5, Vdata6) into the voltage of the data signal. Can print However, it is not limited thereto.

The first gray voltage (Gamma Min) may be supplied as 0V, and the second gray voltage (Gamma Max) may be supplied as 6V. If it is assumed that the size of each resistor of the resistance row 121a is the same, the digital-to-analog converter 120a may output voltages of 0V, 1V, 2V, 3V, 4V, 5V, 6V. That is, the voltage of the data signal may have a value between 0V and 6V.

In addition, the first gray voltage (Gamma Min) may be supplied as -4V, and the second gray voltage (Gamma Max) may be supplied as 2V. Assuming that the size of each resistor in the resistance row 121a is the same, the digital-to-analog converter 120a can output voltages of -4V, -3V, -2V, -1V, 0V, 1V, and 2V. That is, the voltage of the data signal may have a value between -4V and 2V.

Therefore, when the first gray voltage (Gamma Min) is supplied by the P-gamma circuit 140a as a negative voltage, the voltage of the data signal output from the digital-to-analog converter 120a may include a negative voltage. Therefore, even if the voltage level of the first initialization voltage VPRER is 0V, the data signal can supply a negative voltage, so that the pixel 101 can display black. Here, although the voltage level of the data signal is shown as including seven voltage levels, the voltage level of the data signal is not limited to the gray level that can be expressed on the display panel 110. The number can be set. For example, when the display panel 110 expresses 255 gradations, the number of voltage levels may be 256.

8 is a structural diagram illustrating an embodiment of an analog-to-digital converter and an operation unit connected to the pixel illustrated in FIG. 6.

Referring to FIG. 8, the analog-to-digital converter 120b may be connected to the second power line VL2 shown in FIG. 3 through the operation unit 123. The analog-to-digital converter 120b may output a digital signal D.sense corresponding to the magnitude of the voltage level calculated by the calculator 123. In addition, when the calculation unit 121b and the analog-to-digital converter 120b are connected through the sampling switch SAMP and the sampling switch SAMP is turned on, the analog voltage converter 120b can receive the output voltage to the calculation unit 123. .

That is, the calculation unit 121b may calculate the magnitude of the voltage level by integrating the voltage VN2 of the second power line VL2 and the second node. The magnitude of the voltage level calculated by the calculator 123 may correspond to the threshold voltage of the first transistor M1 shown in FIG. 3. That is, the magnitude of the voltage calculated by the operation unit 121b may correspond to the threshold voltage information φ corresponding to the threshold voltage. Then, the analog digital converter 120b may output a digital signal D.sense in response to the voltage level calculated by the operation unit 123. The analog digital converter 120b may convert an analog signal into a digital signal in response to a negative reference voltage and a positive reference voltage. The analog digital converter 120b may output a digital signal D.sense by comparing the voltage level of the threshold voltage output from the operation unit 123 with a negative reference voltage or a positive reference voltage. The digital signal D.sense output from can be transferred to the timing controller 130 and the timing controller 130 can generate an image signal using the digital signal D.sense. Therefore, the image signal generated by the timing controller 130 may correspond to a threshold voltage. The converted threshold voltage information φ into a digital signal D.sense may be referred to as threshold voltage information φcomp shown in FIG. 12.

9 is a circuit diagram showing an embodiment of the operation unit shown in FIG. 8, and FIG. 10 is a timing diagram showing operation of the operation unit in a sensing period.

9 and 10, the operation unit 123 may include an amplifier 1211 and a feedback capacitor Cf connected between the negative input terminal (-) and the output terminal Vo of the amplifier 1211. Further, the operation unit 121b may include an initialization switch SW1 connected in parallel to the feedback capacitor Cf. A predetermined voltage may be transmitted to the positive input terminal (+) of the amplifier 1211.

Further, the negative input terminal (-) of the amplifier 1211 may be connected to the second power line VL2 shown in FIG. 3. Here, although the second power line VL2 is illustrated as being directly connected to the negative input terminal (-), it may be connected through the third transistor M3 illustrated in FIG. 3. However, it is not limited thereto, and may be connected through a separate switch.

In addition, the sensing period Ts may be performed after the initialization period Tini is performed. In the initialization period Tini, the gate signal GATE and the sensing control signal SENSE may be supplied in a high state. The gate signal GATE and the sensing control signal SENSE may be simultaneously supplied in a high state. However, it is not limited thereto. When the gate signal GATE and the sensing control signal SENSE are supplied in a high state, the second transistor M2 and the third transistor M3 may be turned on. Also, the initialization switch SW1 may be turned on. When the initialization switch SW1 is turned on, the same voltage as that of the positive input terminal (+) is transmitted to the negative input terminal (-), so that the feedback capacitor Cf can be initialized. The voltage of the output terminal Vo may be equal to the positive input terminal (+) of the amplifier 1211. For example, the voltage applied to the output terminal Vo and the positive input terminal + of the amplifier 1211 may be the second initialization voltage Vref_CL. Also, the second initialization voltage Vref_CL may be transmitted to the second node N2. Therefore, the voltage of the output terminal Vo of the amplifier 1211 may be the second reference voltage Vref-CL.

In addition, the initialization switch SW1 may be turned off in the sensing period Ts. When the initialization switch SW1 is turned off, the feedback capacitor Cf may charge the voltage difference between the positive input terminal (+) and the output terminal (Vo) of the amplifier 1211. In addition, the voltage of the output terminal Vo of the amplifier 1211 may be lowered corresponding to the voltage charged in the feedback capacitor Cf. That is, in the sensing period Ts, the voltage of the output terminal Vo of the amplifier 1211 may be lower than the second reference voltage Vref-CL. Also, in the sensing period Ts, the operation unit 123 may output a negative voltage. Then, when the sampling switch SAMP is turned on, the voltage of the output terminal Vo of the amplifier 1211 may be transmitted to the analog digital converter 120b.

The analog digital converter 120b may output a digital signal (D. Sense) by comparing it with a negative reference voltage and a positive reference voltage. That is, the analog digital converter 120b may generate a digital signal D.Sense even when a negative voltage or a positive voltage is transmitted from the operation unit 123. Therefore, the analog digital converter 120b can use the entire output range. That is, when the voltage level of the initialization voltage Vref_CL input to the positive input terminal (+) of the amplifier 1211 becomes 0 V, the voltage level of the output terminal Vo of the amplifier 1211 is the maximum voltage of the analog digital converter 120b. The resolution of the analog-to-digital converter 12b can be increased because it can go down to the range. Therefore, the accuracy of threshold voltage sensing can be improved.

11 is a structural diagram showing an embodiment of the configuration of the timing controller and the power supply unit shown in FIG. 1.

Referring to FIG. 11, the timing controller 130 receives input of the threshold voltage φcomp for the threshold voltage φ as a digital signal D.sense and a digital signal D.sense. Voltage information including voltage levels of a first gray voltage (Gamma Min), a second gray voltage (Gamma Max), and a first power supply (EVDD) corresponding to the threshold voltage information (φcomp) using the threshold voltage information (φcomp). The first gradation voltage using the voltage information stored in the voltage table 132 using the received threshold voltage information φcomp received from the voltage table 132 storing the data and the input unit 131 and received threshold voltage information φcomp. The voltage setting unit 133 may be configured to set a voltage level of (Gamma Min), a second gray voltage (Gamma Max), a voltage level of the first power supply (EVDD), and a voltage level of the second power supply (EVSS).

Then, the voltage setting unit 133 transmits information about the first gray voltage (Gamma Min) and the second gray voltage (Gamma Max) to the negative voltage source 140b, and the negative voltage source 140b is the first gray level. Information about the voltage (Gamma Min) and the second gradation voltage (Gamma Max) may be transmitted to the P-gamma circuit 140a. Also, the P-gamma circuit 140a may output a first gray voltage (Gamma Min) and a second gray voltage (Gamma Max). The first gradation voltage (Gamma Min) output from the P-gamma circuit 140a may be changed in response to a threshold voltage, and the magnitude of the driving current as shown in Equation 1 above is the first transistor M1. It may correspond to the difference between the gate voltage (Vg) and the threshold voltage (Vth) of (if Vs is 0), and the gate voltage (Vg) of the first transistor M1 may be changed by the threshold voltage. When calculating the data signal, if the gate voltage Vg is not changed by the threshold voltage, the margin of the threshold voltage information φcomp should be considered as shown in FIG. 12A, but the gate voltage Vg When) is changed by the threshold voltage, as illustrated in FIG. 12B, only the voltage Vdata and the threshold voltage information φcomp of the data signal can be considered, thereby lowering the voltage level of the data signal. Therefore, power consumption of the organic light emitting display device 100 can be reduced. Here, the threshold voltage information φcomp is to convert the scattered threshold voltage to a digital signal as shown in FIG. 4, and may be converted to a digital signal and shifted to the right in the graph shown in FIG. 4.

Also, the voltage setting unit 133 may set the voltage level of the first power supply EVDD. The voltage level of the first power supply EVDD may be set corresponding to the sum of the difference between the voltage of the gate electrode of the first transistor and the voltage of the source electrode (the second node N2 of FIG. 2) and the threshold voltage. The voltage of the gate electrode of the first transistor M1 is the second gradation voltage (Gamma Max) than that shown in FIG. 12A because the margin is not set as shown in FIG. 12B. Can be set low.

In addition, the voltage level of the first gray voltage (Gamma Min) is not fixed and can be lowered to a negative voltage, thereby lowering the voltage level of the first power supply EVDD. Therefore, power consumption can be reduced by using the voltage level of the first power source EVDD as a low voltage. The first power supply (EVDD) is supplied to the display panel 110 by bypassing the power supply unit 140 shown in FIG. 1 from the first power supply unit 160 in the external set, and the first power supply unit 160 is After receiving information about the voltage level of the first power supply EVDD provided by the voltage setting unit 133, the voltage level of the first power supply EVDD may be determined and supplied to the power supply unit 140.

Also, the negative voltage source 140b may supply a second power source EVSS. Therefore, the second power supply EVSS may have a voltage lower than 0V. Also, the negative voltage source 140b may supply the first reference voltage as a negative voltage to the analog-to-digital converter 120b of the drive circuit 120 shown in FIG. 6.

13 is a graph showing a voltage level of a data signal according to usage time in an organic light emitting display device according to embodiments of the present invention.

Referring to FIG. 13, the horizontal axis represents the passage of time, and the vertical axis represents the difference between the second gray voltage (Gamma Max) and the first gray voltage (Gamma Min). It can be seen that even when time passes, the voltage of the data signal voltage Vdata is constant, and the magnitude of the threshold voltage information φcomp increases with the passage of time. The magnitude of the threshold voltage information φcomp may be added to the data signal Vdata signal in response to the increase in the size of the threshold voltage information φcomp over time. That is, the first gradation voltage (Gamma Min) may be calculated by reflecting that the threshold voltage information φcomp changes due to deterioration with time. Therefore, it is possible to prevent the image quality from deteriorating depending on the usage time.

14 is a flowchart illustrating a method of driving an organic light emitting display device according to an exemplary embodiment of the present invention.

Referring to FIG. 14, a method of driving an organic light emitting display device may sense threshold voltages of all pixels of the display panel 110 of the organic light emitting display device (S1400 ). Threshold voltage information may be generated by converting the sensed threshold voltage into a digital signal. The threshold voltage can be calculated using an integrator. In addition, the threshold voltage information may be generated by converting the threshold voltage in the analog-to-digital converter 120b into a digital signal D.sense.

Then, the first gray voltage (Gamma Min) may be set (S1410). The voltage level of the first gradation voltage (Gamma Min) may be changed according to the magnitude of the threshold voltage. The current flowing through the first transistor M1 included in the pixel 101 flows as shown in Equation 1 above, after fixing the voltage of the second node N2 to 0V and then applying the current to the first transistor M1. When the voltage Vdata of the data signal transmitted to the gate electrode is adjusted according to the magnitude of the threshold voltage, the voltage level of the data signal can be lowered to reduce power consumption of the organic light emitting display device 100. In addition, in response to lowering the voltage level of the data signal, the voltage level of the first power supply EVDD can also be lowered, thereby reducing power consumption of the organic light emitting display device 100.

Then, each pixel 101 of the organic light emitting display device 100 may emit light in correspondence with the set first gray voltage (Gamma Min) and the corresponding second gray voltage (Gamma Max) (S1420).

In addition, the threshold voltage of the first transistor M1 of the pixel 101 illustrated in FIG. 3 may be sensed. After transmitting the second initialization voltage (Vref_CL) to the second node (N2) connected to the first transistor (M1), the first output voltage is output, and the output voltage is second output in response to the current flowing through the second node (N2). The voltage difference may be calculated by comparing voltages, and a threshold voltage of the first transistor M1 may be calculated corresponding to the calculated voltage difference. At this time, the voltage level of the second initialization voltage Vref_CL may be 0V. However, it is not limited thereto. An integrator can be used to calculate the threshold voltage. The integrator can be divided into an initialization period and a sensing period, and receives a second initialization voltage (Vref_CL) during the initialization period, outputs a first output voltage corresponding to the second initialization voltage (Vref_CL), and outputs a second during the sensing period. The second output voltage having a voltage level lower than the second initialization voltage Vref_CL may be outputted in response to the current flowing through the second node N2 by receiving the initialization voltage Vref_CL. At this time, the second output voltage may have a negative value. In addition, the output voltage of the integrator can be transferred to the analog digital converter. The analog digital converter can output a digital signal corresponding to the negative voltage using a negative reference voltage and a positive reference voltage.

The above description and the accompanying drawings are merely illustrative of the technical spirit of the present invention, and those of ordinary skill in the art to which the present invention pertains combine combinations of configurations without departing from the essential characteristics of the present invention. , Various modifications and variations such as separation, substitution and change will be possible. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the claims below, and all technical spirits within the scope equivalent thereto should be interpreted as being included in the scope of the present invention.

100: organic light emitting display device
101: pixel
110: display panel
120: drive circuit
130: timing controller
140: power supply

Claims (18)

A display panel including a plurality of pixels;
A drive circuit that generates a data signal corresponding to the image signal and supplies the data signal to the plurality of pixels;
A timing controller that supplies the video signal to the drive circuit;
The display panel includes a first power supply and a power supply unit that supplies a second power supply having a lower voltage level than the first power supply.
In the first period, the threshold voltages of the plurality of pixels are sensed,
In the second period, the image signal generated corresponding to the threshold voltage is received, and the data signal is generated and supplied to the plurality of pixels. The plurality of pixels receive the data signal and the first initialization voltage,
In the third period, the plurality of pixels generate the driving current corresponding to the data signal and the first initialization voltage,
The drive circuit generates the data signal corresponding to the first grayscale voltage and the second grayscale voltage, but the voltage level of the first grayscale voltage is varied to correspond to the threshold voltage sensed in the first period. Device.
According to claim 1,
The organic light emitting display device of claim 1, wherein the voltage level of the first gradation voltage is lower than the voltage level of the first initialization voltage and the voltage level of the second gradation voltage is higher than the voltage level of the first initialization voltage.
According to claim 1,
The voltage level of the second grayscale voltage is determined by the sum of the voltage level of the first grayscale voltage and the voltage level of the threshold voltage.
According to claim 1,
The plurality of threshold voltages are sensed by the drive circuit, and the image signal is an organic light emitting display device generated by the timing controller.
According to claim 1,
The voltage level of the first power supply corresponds to the sum of the maximum voltage level of the second gradation voltage and the threshold voltage.
According to claim 1,
The drive circuit further includes a P-gamma circuit that transmits the first gradation voltage and the second gradation voltage having a higher predetermined voltage level than the first gradation voltage, and the P-gamma circuit includes the threshold voltage. An organic light emitting display device for determining the voltage level of the first gradation voltage by receiving threshold voltage information for the.
According to claim 1,
An analog-to-digital converter for generating a digital signal corresponding to a threshold voltage calculated by the calculation unit and a calculation unit for calculating a threshold voltage by receiving information corresponding to the threshold voltage corresponding to a second initialization voltage to the plurality of pixels is further provided. Organic light emitting display device comprising.
The method of claim 7,
The operation unit outputs a negative voltage, and the analog digital converter outputs a digital signal corresponding to the negative voltage output from the operation unit.
According to claim 1,
At least one of the plurality of pixels,
A first transistor supplying a driving current to the second node in response to a data signal transmitted to the gate electrode connected to the first node;
A second transistor supplying the data signal to the first node in response to a gate signal;
A capacitor connected between the first node and the second node;
A third transistor transmitting the first initialization voltage to the second node in response to a sensing control signal; And
An organic light emitting display device including an organic light emitting diode that emits light by receiving the driving current.
A display panel including a plurality of pixels;
Supplying a first gradation voltage having a voltage level lower than a first initialization voltage and a second gradation voltage having a voltage level higher than the first initialization voltage, but receiving first gradation voltage information for the voltage level of the first gradation voltage A P-gamma circuit for determining and supplying a voltage level of the first initialization voltage;
A timing controller configured to receive the threshold voltage information of the plurality of pixels and set the first grayscale voltage information; and
And a drive circuit that generates a data signal corresponding to the first gradation voltage and the second gradation voltage and supplies it to the plurality of pixels.
The method of claim 10,
The plurality of pixels includes a first transistor that generates a driving current corresponding to the first initialization voltage and the data signal, and an organic light emitting display device including an organic light emitting diode that receives the driving current and emits light.
The method of claim 10,
The threshold voltage information includes a threshold voltage of the first transistor, and the threshold voltage information is sensed by the drive circuit.
The method of claim 10,
An organic light emitting display device further comprising a negative voltage source, the negative voltage source outputting a voltage level of the first gradation voltage to a voltage lower than the first initialization voltage corresponding to the threshold voltage.
The method of claim 13,
The drive circuit further comprises a digital-to-analog converter that outputs a voltage of a data signal corresponding to the voltage level of the first gradation voltage and the voltage level of the second gradation voltage from the negative voltage source.
The method of claim 10,
The timing controller is provided from an input unit that receives threshold voltage information as a digital signal, and a voltage table and input unit that stores voltage information including the first grayscale voltage and the second grayscale voltage using the threshold voltage information received as the digital signal. An organic light emitting display device using the received threshold voltage information to set voltage levels of the first and second gradation voltages using the voltage information stored in the voltage table and transmit the voltage levels to the P-gamma circuit.
The method of claim 15,
The voltage table stores information about the voltage level of the first power source, and the voltage setting unit calculates the voltage level of the first power source in response to the threshold voltage.
In the driving method for driving an organic light emitting display device including a plurality of pixels,
Sensing threshold voltages of the plurality of pixels;
Generating a first grayscale voltage lower than a first initialization voltage and a second grayscale voltage higher than the first initialization voltage, wherein the voltage level of the first grayscale voltage is set corresponding to the threshold voltage; And
And driving an organic light emitting diode corresponding to the first gray level voltage and the second gray level voltage.
The method of claim 17,
In the sensing of the threshold voltage, a method of driving an organic light emitting display device that senses the voltage level of the threshold voltage in response to the voltage level of the first initialization voltage.

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